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M58BF008B100ZA6T Datasheet(PDF) 10 Page - STMicroelectronics |
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M58BF008B100ZA6T Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 36 page M58BF008 10/36 Clear Status Register (CLRS). The Clear Status Register instruction consists of one write cycle giv- ing the command 50h at the address 00000h. The Clear Status Register command clears the bits 3, 4 and 5 of the Status Register if they have been set to ’1’ by the P/E.C. operation. The Clear Status Register command should be given after an error has been detected and before any new operation is attempted. A Read Memory Array command should also be given before data can be read from the memory array. Read Electronic Signature (RSIG). The Read Electronic Signature instruction consists of a first write cycle giving the command 90h at the address 00000h. This is followed by three read operations at addresses xxxx0h, xxxx1h and xxxx2h which output the manufacturer, device and version codes respectively. Table 7. Instructions Mne- monic Instruction Cycles 1st Cycle 2nd Cycle Operation Address Data Operation Address. Data RD Read Memory Array 1+ Write 00000h FFh Read Read Address Data Output RSR Read Status Register 1+ Write 00000h 70h Read X Status Register CLRS Clear Status Register 1 Write 00000h 50h RSIG Read Electronic Signature 1+++ Write 00000h 90h Read Signature Address Electronic Signature EE Erase 2 Write 00000h 20h Write Block Address D0h OBEE Overlay Block Erase 2 Write 00000h 02h Write Overlay Block Address 0Dh PG Program 2 Write 00000h 40h Write Program Address Data Input OBPG Overlay Block Program 2 Write 00000h 04h Write Overlay Block Program Address Data Input PES Program/Erase Suspend 1 Write 00000h B0h PER Program/Erase Resume 1 Write 00000h D0h ART Asynch/Synch Read Toggle 1 Write 00000h 60h WBT Wrap//No-wrap Burst Toggle 1 Write 00000h 30h OBT Overlay Block Read En/Dis Toggle 1+ Write 00000h 06h Read Read Address Data Output Read Memory Array (RD). The Read Memory Array instruction consists of one write cycle giving the command FFh at the address 00000h. Subse- quent read operations will read the addressed lo- cation and output the memory data. The data can be read from the Main memory Array or the Over- lay memory block if it is enabled. Read Status Register (RSR). The Read Status Register instruction consists of one write cycle giv- ing the command 70h at the address 00000h. Sub- sequent read operations will output the Status Register contents. See Table 8 for an explanation of the Status Register bits. The Status Register in- dicates when a program or Erase operation is complete and its success or failure. The Status Register also indicates if the Overlay block is ac- cessible for reading. The Read Status Register in- struction may be given at any time, including while a program or erase operation in progress. |
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