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278106-002 Datasheet(PDF) 7 Page - Intel Corporation |
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278106-002 Datasheet(HTML) 7 Page - Intel Corporation |
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7 / 164 page  Preliminary Datasheet vii 21150 Figures 1 21150 on the System Board.................................................................................. 2 2 21150 with Option Cards....................................................................................... 3 3 21150 on the System Board.................................................................................. 4 4 21150 Downstream Data Path .............................................................................. 5 5 21150 Pin Assignment ........................................................................................19 6 Flow-Through Posted Memory Write Transaction...............................................31 7 Downstream Delayed Write Transaction.............................................................34 8 Multiple Memory Write Transactions Posted and Initiated as Fast Back-to-Back Transactions on the Target Bus.................................................................36 9 Nonprefetchable Delayed Read Transaction ......................................................40 10 Prefetchable Delayed Read Transaction.............................................................41 11 Flow-Through Prefetchable Read Transaction....................................................42 12 Configuration Transaction Address Formats .......................................................43 13 Delayed Write Transaction Terminated with Master Abort..................................49 14 Delayed Read Transaction Terminated with Target Abort ..................................52 15 I/O Transaction Forwarding Using Base and Limit Addresses............................56 16 I/O Transaction Forwarding in ISA Mode ............................................................58 17 Memory Transaction Forwarding Using Base and Limit Registers .....................60 18 Secondary Arbiter Example.................................................................................86 19 Example of gpio Clock Mask Implementation on the System Board...................91 20 Clock Mask Load and Shift Timing......................................................................92 21 p_clk and s_clk Relative Timing ..........................................................................95 22 21150 Configuration Space ...............................................................................104 23 PCI Clock Signal AC Parameter Measurements...............................................145 24 PCI Signal Timing Measurement Conditions.....................................................147 25 208-Pin PQFP Package ....................................................................................153 Tables 1 21150 Functional Blocks ....................................................................................... 4 2 Signal Pins ............................................................................................................ 7 3 Signal Types.......................................................................................................... 7 4 Primary PCI Bus Interface Signals ........................................................................ 8 5 Secondary PCI Bus Interface Signals .................................................................11 6 Secondary PCI Bus Interface Signals .................................................................13 7 General-Purpose I/O Interface Signals ...............................................................14 8 Clock Signals.......................................................................................................14 9 Reset Signals ......................................................................................................15 10 Miscellaneous Signals.........................................................................................16 11 JTAG Signals ......................................................................................................17 12 Signal Types........................................................................................................20 13 Numeric Pin Assignments ...................................................................................21 14 Alphabetic Pin Assignments................................................................................24 15 21150 PCI Transactions......................................................................................27 16 Write Transaction Forwarding .............................................................................29 17 Write Transaction Disconnect Address Boundaries ............................................35 18 Read Transaction Prefetching.............................................................................36 19 Read Prefetch Address Boundaries ....................................................................38 |
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