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SLRC400 Datasheet(PDF) 2 Page - NXP Semiconductors |
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SLRC400 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 130 page  Philips Semiconductors Product Specification Rev. 2.0 November 2001 I •CODE Reader IC SL RC400 2 Preliminary CONTENTS 1 GENERAL INFORMATION..........................................................................................................6 1.1 Scope .........................................................................................................................................6 1.2 General Description.....................................................................................................................6 1.3 Features .....................................................................................................................................7 1.4 Ordering Information ....................................................................................................................7 2 BLOCK DIAGRAM ......................................................................................................................8 3 PINNING INFORMATION ............................................................................................................9 3.1 Pin Configuration .........................................................................................................................9 3.2 Pin Description.......................................................................................................................... 10 4 PARALLEL INTERFACE........................................................................................................... 12 4.1 Overview of Supported µ-Processor Interfaces ............................................................................ 12 4.2 Automatic µ-Processor Interface Type Detection.......................................................................... 12 4.3 Connection to Different µ-Processor Types ................................................................................. 13 4.3.1 Separated Read/Write Strobe: Intel Type Compatible................................................................... 13 4.3.2 Common Read/Write Strobe: Motorola Type Compatible.............................................................. 14 4.3.3 Common Read/Write Strobe and Hand-Shake Mechanism: EPP.................................................. 15 5 SL RC400 REGISTER SET........................................................................................................ 16 5.1 SL RC400 Registers Overview ................................................................................................... 16 5.1.1 Register Bit Behaviour ............................................................................................................... 18 5.2 Register Description................................................................................................................... 19 5.2.1 Page 0: Command and Status .................................................................................................... 19 5.2.2 Page 1: Control and Status ........................................................................................................ 27 5.2.3 Page 2: Transmitter and Control ................................................................................................. 33 5.2.4 Page 3: Receiver and Decoder Control ....................................................................................... 37 5.2.5 Page 4: RF-Timing and Channel Redundancy............................................................................. 43 5.2.6 Page 5: FIFO, Timer and IRQ- Pin Configuration ......................................................................... 48 5.2.7 Page 7: Test Control .................................................................................................................. 54 5.3 SL RC400 Register Flags Overview............................................................................................ 58 5.4 Modes of Register Addressing.................................................................................................... 61 5.4.1 Paging Mechanism .................................................................................................................... 61 5.4.2 Dedicated Address Bus.............................................................................................................. 61 5.4.3 Multiplexed Address Bus............................................................................................................ 61 6 MEMORY ORGANISATION OF THE E²PROM ........................................................................... 62 6.1 Diagram of the E²PROM Memory Organisation............................................................................ 62 6.2 Product Information Field (Read Only) ........................................................................................ 62 6.3 Register Initialisation Files (Read/Write) ...................................................................................... 63 |
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