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K50-HC Datasheet(PDF) 1 Page - Kyocera Kinseki Corpotation |
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K50-HC Datasheet(HTML) 1 Page - Kyocera Kinseki Corpotation |
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1 / 7 page  Clock Crystal Oscillators Surface Mount Type K50H-3C Series CMOS / 3.3V / 7.0 ×5.0A Features • Miniature ceramic package • Highly reliable with seam welding • CMOS output • Supply voltage VDD=3.3V • Internal Bypass Capacitor • Low Jitter • ±25ppm available Table 1 How to Order Dimensions Specifications (Unit : mm) Recommended Land Pattern (Unit : mm) K50H-3C 0 - S E 125.000 qType(7 ×5 SMD, 3.3V) wFrequency Stability Code(See Table1) eDuty Ratio(S: 45% to 55% STD) rEnable/Disable Function(STD) tOscillation Frequency(Ex.: 125.000MHz) Packaging(Tape & Reel 1,000pcs/reel) w qe r t Stability TOPR Note Code (ppm) ( °C) 0 ± 50 −10 to +70 Standard specifications S ± 30 (Standard) U ± 25 F ±100 −40 to +85 G ± 50 (Extend) With only certain frequencies With only certain frequencies Note: K50H Series has Bypass Capacitor of 0.01 µF between VDD and GND. 1.8 5.08 Plating: Ni +Au Tolerance: ±0.2 Pin Connections q Control w Case GND e Output r VDD Enable/Disable Function Pin1 Pin3(Output) Open Active "H" Level Active "L" Level High Z(No-Oscillation) 7.0 1.4 q w r e 5.08 0.6 Overall conditions: initial tolerance, operating temperature range, rated power supply voltage change, load change, aging(1year @25 °C), shock and vibration Note: Please contact us for inquires about extended operating temperature range, available frequencies and other conditions. All electrical characteristics are defined at the maximum load and operating temperature range. Item Symbol Conditions Min. Max. Units 20% VDD to 80% VDD 10% VDD to 90% VDD 20% VDD to 80% VDD 10% VDD to 90% VDD Output Frequency Range Frequency Stability Storage Temperature Range Operating Temperature Range Max. Supply Voltage Supply Voltage Current Consumption (Maximum Loaded) Duty Ratio(Symmetry) Duty Ratio(Symmetry) Rise/Fall Time (10% VDD to 90% VDD Maximum Loaded) Output Voltage-"L" Output Voltage-"H" Output Load Input Voltage Range Input Voltage-"L" Input Voltage-"H" Output Disable Time Output Enable Time Start-up Time Deterministic Jitter pk-pk 1Sigma jitter FOUT 50 170 MHz −25 +25 FSBY −30 +30 ppm −50 +50 TSTG −55 +125 TOPR Standard −10 +70 °C Extend(option) −40 +85 ----- −0.5 7.0 VDD Stability: ±50ppm, ±100ppm(Ext Temp) 2.97 3.63 Volt Stability: ±25ppm, ±30ppm, ±50ppm(Ext Temp) 3.14 3.46 50 ≤FOUT≤ 85MHz ----- 30 IDD 85<FOUT ≤100MHz ----- 40 mA 100<FOUT ≤135MHz ----- 50 135<FOUT ≤160MHz ----- 60 IST Standby Function ----- 10 µA SYM @50% VDD 45 55 % 50 ≤FOUT<100MHz ----- 3.5 Tr/Tf ----- 5.0 nS 100 ≤FOUT≤160MHz ----- 1.5 ----- 2.0 VOL ----- 10% VDD Volt VOH 90% VDD ----- CL CMOS ----- 15 pF VIN 0 VDD Volt VIL ----- 30% VDD Volt VIH 70% VDD ----- ----- ----- 5 mS ----- ----- 150 nS ST @Minimum operating Voltage to be 0sec. ----- 10 mS DJ Measured with "Wavecrest DTS-2079", VISI 6.3.1 ----- 2 psec 1sigma ----- 4 Pb Free RoHS Conforming |
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Similar Description - K50-HC |
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