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M295V040-120XN6R Datasheet(PDF) 3 Page - STMicroelectronics

Part # M295V040-120XN6R
Description  4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory
Download  31 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M295V040-120XN6R Datasheet(HTML) 3 Page - STMicroelectronics

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Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
(3)
–40 to 125
°C
TBIAS
Temperature Under Bias
–50 to 125
°C
TSTG
Storage Temperature
–65 to 150
°C
VIO
(2)
Input or Output Voltages
–0.6 to 7
V
VCC
Supply Voltage
–0.6 to 7
V
VA9
(2)
A9 Voltage
–0.6 to 13.5
V
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns.
3. Depends on range.
Table 2. Absolute Maximum Ratings (1)
tected against program and erase. Block erasure
may be suspended, while data is read from other
blocks of the memory, and then resumed.
Bus Operations
Seven operations can be performed by the appro-
priate bus cycles, Read Array, Read Electronic
Signature, Output Disable, Standby, Protect Block,
Unprotect Block, and Write the Command of an
Instruction.
Command Interface
Command Bytes can be written to a Command
Interface (C.I.) latch to perform Reading (from the
Array or Electronic Signature), Erasure or Pro-
gramming. For added data protection, command
execution starts after 4 or 6 command cycles. The
first, second, fourth and fifth cycles are used to
input a code sequence to the Command Interface
(C.I.). This sequence is equal for all P/E.C. instruc-
tions. Command itself and its confirmation - if it
applies - are given on the third and fourth or sixth
cycles.
Instructions
Seven instructions are defined to perform Reset,
Read Electronic Signature, Auto Program, Block
Auto Erase, Chip Auto Erase, Block Erase Suspend
and Block Erase Resume. The internal Pro-
gram/Erase Controller (P/E.C.) handles all timing
and verification of the Program and Erase instruc-
tions and provides Data Polling, Toggle, and Status
data to indicate completion of Program and Erase
Operations.
Instructions are composed of up to six cycles. The
first two cycles input a code sequence to the Com-
mand Interface which is common to all P/E.C.
instructions (see Table 7 for Command Descrip-
tions). The third cycle inputs the instruction set up
command instruction to the Command Interface.
Subsequent cycles output Signature, Block Protec-
tion or the addressed data for Read operations.
For added data protection, the instructions for pro-
gram, and block or chip erase require further com-
mand inputs. For a Program instruction, the fourth
command cycle inputs the address and data to be
programmed. For an Erase instruction (block or
chip), the fourth and fifth cycles input a further code
sequence before the Erase confirm command on
the sixth cycle. Byte programming takes typically
10
µs while erase is performed in typically 1.0 sec-
ond.
Erasure of a memory block may be suspended, in
order to read data from another block, and then
resumed. Data Polling, Toggle and Error data may
be read at any time, including during the program-
ming or erase cycles, to monitor the progress of
the operation. When power is first applied or if VCC
falls below VLKO, the command interface is reset to
Read Array.
3/31
M29F040


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