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GAL16LV8C-10LJN Datasheet(PDF) 11 Page - Lattice Semiconductor |
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GAL16LV8C-10LJN Datasheet(HTML) 11 Page - Lattice Semiconductor |
11 / 22 page Specifications GAL16LV8D 11 -3 MIN. MAX. -5 MIN. MAX. tpd2 A Input or I/O to Combinational Output 1 3.5 1 5 ns tco2 A Clock to Output Delay 1 2.5 1 3 ns tcf3 — Clock to Feedback Delay — 2 — 2 ns tsu — Setup Time, Input or Feedback before Clock↑ 3— 4 — ns th— Hold Time, Input or Feedback after Clock↑ 0— 0 — ns A Maximum Clock Frequency with 180 — 142.8 — MHz External Feedback, 1/(tsu + tco) fmax4 A Maximum Clock Frequency with 200 — 166 — MHz Internal Feedback, 1/(tsu + tcf) A Maximum Clock Frequency with 250 — 166 — MHz No Feedback twh4 — Clock Pulse Duration, High 2 — 3 — ns twl4 — Clock Pulse Duration, Low 2 — 3 — ns ten B Input or I/O to Output Enabled — 4.5 — 6 ns B OE to Output Enabled — 3.5 — 5 ns tdis C Input or I/O to Output Disabled — 4.5 — 6 ns C OE to Output Disabled — 3.5 — 5 ns UNITS PARAMETER TEST COND1. DESCRIPTION 1) Refer to Switching Test Conditions section. 2) Minimum values for tpd and tco are not 100% tested but established by characterization. 3) Calculated from fmax with internal feedback. Refer to fmax Descriptions section. 4) Refer to fmax Descriptions section. Characterized but not 100% tested. COM COM SYMBOL PARAMETER TYPICAL UNITS TEST CONDITIONS C I Input Capacitance 5 pF V CC = 3.3V, VI = 0V C I/O I/O Capacitance 5 pF V CC = 3.3V, VI/O = 0V AC Switching Characteristics Over Recommended Operating Conditions Capacitance (T A = 25°C, f = 1.0 MHz) |
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