Table of Contents
About This Document .................................................................................................................... 17
Audience .............................................................................................................................................. 17
About This Manual ................................................................................................................................ 17
Related Documents ............................................................................................................................... 17
Documentation Conventions .................................................................................................................. 17
1
Architectural Overview ...................................................................................................... 19
1.1
Product Features ...................................................................................................................... 19
1.2
Target Applications .................................................................................................................... 23
1.3
High-Level Block Diagram ......................................................................................................... 23
1.4
Functional Overview .................................................................................................................. 24
1.4.1
ARM Cortex™-M3 ..................................................................................................................... 25
1.4.2
Motor Control Peripherals .......................................................................................................... 25
1.4.3
Analog Peripherals .................................................................................................................... 26
1.4.4
Serial Communications Peripherals ............................................................................................ 26
1.4.5
System Peripherals ................................................................................................................... 27
1.4.6
Memory Peripherals .................................................................................................................. 28
1.4.7
Additional Features ................................................................................................................... 29
1.4.8
Hardware Details ...................................................................................................................... 29
2
ARM Cortex-M3 Processor Core ...................................................................................... 30
2.1
Block Diagram .......................................................................................................................... 31
2.2
Functional Description ............................................................................................................... 31
2.2.1
Serial Wire and JTAG Debug ..................................................................................................... 31
2.2.2
Embedded Trace Macrocell (ETM) ............................................................................................. 32
2.2.3
Trace Port Interface Unit (TPIU) ................................................................................................. 32
2.2.4
ROM Table ............................................................................................................................... 32
2.2.5
Memory Protection Unit (MPU) ................................................................................................... 32
2.2.6
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 32
3
Memory Map ....................................................................................................................... 36
4
Interrupts ............................................................................................................................ 38
5
JTAG Interface .................................................................................................................... 40
5.1
Block Diagram .......................................................................................................................... 41
5.2
Functional Description ............................................................................................................... 41
5.2.1
JTAG Interface Pins .................................................................................................................. 42
5.2.2
JTAG TAP Controller ................................................................................................................. 43
5.2.3
Shift Registers .......................................................................................................................... 44
5.2.4
Operational Considerations ........................................................................................................ 44
5.3
Initialization and Configuration ................................................................................................... 45
5.4
Register Descriptions ................................................................................................................ 46
5.4.1
Instruction Register (IR) ............................................................................................................. 46
5.4.2
Data Registers .......................................................................................................................... 48
6
System Control ................................................................................................................... 50
6.1
Functional Description ............................................................................................................... 50
6.1.1
Device Identification .................................................................................................................. 50
6.1.2
Reset Control ............................................................................................................................ 50
3
October 01, 2007
Preliminary
LM3S808 Microcontroller