M48Z18-100PC1 datasheet(5/18 Pages) STMICROELECTRONICS

Part #	M48Z18-100PC1

Description	64 Kbit 8Kb x 8 ZEROPOWER SRAM

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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5 / 18 page

Symbol

Parameter

Min

Max

Unit

tPD

E or W at VIH before Power Down

0

µs

tF

(1)

VPFD (max) to VPFD (min) VCC Fall Time

300

µs

tFB

(2)

VPFD (min) to VSO VCC Fall Time

10

µs

tR

VPFD(min) to VPFD (max) VCC Rise Time

0

µs

tRB

VSO to VPFD (min) VCC Rise Time

1

µs

tREC

E or W at VIH after Power Up

1

ms

Notes:1. VPFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring until 200

µs after

VCC passes VPFD (min).

2. VPFD (min) to VSO fall time of less than tFB may cause corruption of RAM data.

Table 8. Power Down/Up Mode AC Characteristics

(TA = 0 to 70

°C)

AI00606

VCC

INPUTS

(PER CONTROL INPUT)

OUTPUTS

DON'T CARE

HIGH-Z

tF

tFB

tR

tREC

tPD

tRB

tDR

VALID

NOTE

(PER CONTROL INPUT)

RECOGNIZED

VPFD (max)

VPFD (min)

VSO

Figure 5. Power Down/Up Mode AC Waveforms

Note: Inputs may or may not be recognized at this time. Caution should be taken to keep E high as VCC rises past VPFD(min). Some systems

may perform inadvertent write cycles after VCC rises above VPFD(min) but before normal system operations begin. Even though a power on

reset is being applied to the processor, a reset condition may not occur until after the system clock is running.

5/18

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M48Z18-100PC1 Datasheet(PDF) 5 Page - STMicroelectronics

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