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M29W400B-120ZA5TR Datasheet(PDF) 10 Page - STMicroelectronics

Part # M29W400B-120ZA5TR
Description  4 Mbit 512Kb x8 or 256Kb x16, Boot Block Low Voltage Single Supply Flash Memory
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M29W400B-120ZA5TR Datasheet(HTML) 10 Page - STMicroelectronics

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Mne.
Instr.
Cyc.
1st Cyc.
2nd Cyc.
3rd Cyc.
4th Cyc.
5th Cyc.
6th Cyc.
7th Cyc.
RD
(2,4)
Read/Reset
Memory Array
1+
Addr.
(3,7)
X
Read Memory Array until a new write cycle is initiated.
Data
F0h
3+
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
Read Memory Array until a new write cycle
is initiated.
Word
5555h
2AAAh
5555h
Data
AAh
55h
F0h
AS
(4)
Auto Select
3+
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
Read Electronic Signature or Block
Protection Status until a new write cycle is
initiated. See Note 5 and 6.
Word
5555h
2AAAh
5555h
Data
AAh
55h
90h
PG
Program
4
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
Program
Address
Read Data Polling or Toggle Bit
until Program completes.
Word
5555h
2AAAh
5555h
Data
AAh
55h
A0h
Program
Data
BE
Block Erase
6
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
AAAAh
5555h
Block
Address
Additional
Block
(8)
Word
5555h
2AAAh
5555h
5555h
2AAAh
Data
AAh
55h
80h
AAh
55h
30h
30h
CE
Chip Erase
6
Addr.
(3,7)
Byte
AAAAh
5555h
AAAAh
AAAAh
5555h
AAAAh
Note 9
Word
5555h
2AAAh
5555h
5555h
2AAAh
5555h
Data
AAh
55h
80h
AAh
55h
10h
ES
(10)
Erase
Suspend
1
Addr.
(3,7)
X
Read until Toggle stops, then read all the data needed from any
Block(s) not being erased then Resume Erase.
Data
B0h
ER
Erase
Resume
1
Addr.
(3,7)
X
Read Data Polling or Toggle Bits until Erase completes or Erase is
suspended another time
Data
30h
Notes: 1. Commands not interpreted in this table will default to read array mode.
2. A wait of tPLYH is necessary after a Read/Reset command if the memory was in an Erase or Program mode
before starting any new operation (see Table 14 and Figure 9).
3. X = Don’t Care.
4. The first cycles of the RD or AS instructions are followed by read operations. Any number of read cycles can occur after
the command cycles.
5. Signature Address bits A0, A1 at VIL will output Manufacturer code (20h). Address bits A0 at VIH and A1 at VIL will output
Device code.
6. Block Protection Address: A0 at VIL,A1 at VIH and A12-A17 within the Block will output the Block Protection status.
7. For Coded cycles address inputs A15-A17 are don’t care.
8. Optional, additional Blocks addresses must be entered within the erase timeout delay after la st write entry, timeout status
can be verified through DQ3 value (see Erase Timer Bit DQ3 description). When full command is entered, read Data Polling or
Toggle bit until Erase is completed or suspended.
9. Read Data Polling, Toggle bits or RB until Erase completes.
10.During Erase Suspend,Read and Data Program functions are allowed in blocks not being erased.
Table 8. Instructions (1)
Status Register Bits
P/E.C. status is indicated during execution by Data
Polling on DQ7, detection of Toggle on DQ6 and
DQ2, or Error on DQ5 and Erase Timer DQ3 bits.
Any read attempt during Program or Erase com-
mand executionwill automaticallyoutput these five
Status Register bits. The P/E.C. automatically sets
bits DQ2, DQ3, DQ5, DQ6 and DQ7. Other bits
(DQ0, DQ1 and DQ4) are reserved for future use
and should be masked. See Tables 9 and 10.
Data Polling Bit (DQ7). When Programming op-
erations are in progress, this bit outputs the com-
plement of the bit being programmed on DQ7.
During Erase operation, it outputs a ’0’. After com-
pletion of the operation, DQ7 will output the bit last
programmed or a ’1’ after erasing. Data Polling is
valid and only effective during P/E.C. operation,
10/34
M29W400T, M29W400B


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