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M39208-10WNA1T Datasheet(PDF) 9 Page - STMicroelectronics |
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M39208-10WNA1T Datasheet(HTML) 9 Page - STMicroelectronics |
9 / 30 page Write a Page in EEPROM Block The Page write allows up to 64 bytes within the same EEPROM page to be consecutively latched into the memory prior to initiating a programming cycle. All bytes must be located in a single page address, that is A6-A12 must be the same for all bytes. Once initiated, the Page write operation is internally timed until completion, that is during a time tWC. The status of the write operation can be seen by reading the Data Polling and Toggle bits (as de- tailed in the READ chapter). A Page write is composed of successive Write instructions which must be sequenced within a time period (between two consecutive Write operations) that is smaller than the tWLWL value. If this period of time exceeds the tWLWL value, the internal program- ming cycle will start. EEPROM Block Software Data Protection A protection instruction allows the user to inhibit all write modes to the EEPROM block: the Software Data Protection (referenced as SDP in the follow- ing). The SDP feature is useful for protecting the EEPROM memory from inadvertent write cycles that may occur during uncontrolled bus conditions. The M39208 is shipped as standard in the unpro- tected state meaning that the EEPROM memory contents can be changed by the user. After the SDP enable instruction, the device enters the Protect Mode where no further write operations have any effect on the EEPROM memory contents. The device remains in this mode until a valid SDP disable instruction is received whereby the device reverts to the unprotected state. To enable the Software Data Protection, the device has to be written (with a Page Write) with three specific data bytes at three specific memory loca- tions (each location in a different page) as shown in Figure 4. This sequence provides an unlock key to enable the write action, and, at the same time, SDP continues to be set. Any further Write in EEPROM when the SDP is set will use this same sequence of three specific data bytes at three specific memory locations followed by the bytes to write. The first SDP enable sequence can be di- rectly followed by the bytes to written. Similarly, to disable the Software Data Protection the user has to write specific data bytes into six different locations with a Page Write addressing different bytes in different pages, as shown in Fig- ure 5. The Software Data Protection state is non-volatile and is not changed by power on/off sequences. The SDP enable/disable instructions set/reset an inter- nal non-volatile bit and therefore will require a write time tWC, This Write operation can be monitored only on the Toggle bit (status bit DQ6). AI01699B WRITE AAh in Address 5555h WRITE 55h in Address 2AAAh WRITE 80h in Address 5555h Unprotected State after tWC (Write Cycle time) WRITE AAh in Address 5555h WRITE 55h in Address 2AAAh WRITE 20h in Address 5555h Page Write Instruction Figure 5. SDP disable Flowchart EF EE G WA6 A9 Other Addresses DQ0 - DQ7 VIH VIL VIH VIL VIL VID Don’t Care 64 bytes User Defined Table 7. Write the EEPROM Block Identifier 9/30 M39208 |
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