Flex Cable, PC Board Interconnect,

and Connectors

Interconnect for LCDS typically has a differential imped-

ance of 110

Ω. Use interconnect and connectors that have

matched differential impedance to minimize impedance

discontinuities.

Board Layout and Supply Bypassing

Separate the logic and LCDS signals to prevent

crosstalk. A PC board or flex with separate layers for

power, ground, and signals is recommended.

surface-mount ceramic 0.1µF and 0.01µF capacitors in

parallel as close to the device as possible, with the

smallest value capacitor closest to the supply pin.

ESD Protection

The MAX9223/MAX9224 LCDS inputs and outputs

(SDO+/SDO-, SDI+/SDI-) are rated for ±15kV ESD pro-

tection using the Human Body Model. The Human Body

1.5k

Ω (Figure 7).

Chip Information

PROCESS: CMOS

22-Bit, Low-Power, 5MHz to 10MHz

Serializer and Deserializer Chipset

______________________________________________________________________________________

11

4096

HIGH

IN POWER-

DOWN

LOW

PCLKIN

DIN_

DATA TRANSFER

PCLKOUT

DOUT_

LOW

HIGH

PWRDN

12

1

1

N

N

DON'T CARE

POWER-

DOWN

DON'T CARE

POWER-UP AND LINK

SYNCHRONIZATION

IN POWER-

DOWN

Figure 6. MAX9223/MAX9224 Power-Up/Power-Down Sequence

100pF

STORAGE

CAPACITOR

HIGH-

VOLTAGE

DC

SOURCE

DEVICE

UNDER

TEST

CHARGE-CURRENT-

LIMIT RESISTOR

DISCHARGE

RESISTANCE

1M

Ω

1.5k

Ω

Figure 7. Human Body Model ESD Test Circuit