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M28C64X-150MS1 Datasheet(PDF) 4 Page - STMicroelectronics |
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M28C64X-150MS1 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 15 page  AI00877C ADDRESS LATCH A5-A12 (Page Address) ATD & CONTROL LOGIC 64K ARRAY ADDRESS LATCH A0-A4 Y DECODE VPP GEN RESET SENSE AND DATA LATCH I/O BUFFERS RB E G W PAGE LOAD TIMER STATUS TOGGLE BIT DATA POLLING DQ0-DQ7 Figure 3. Block Diagram Microcontroller Control Interface The M28C64C provides two write operation status bits and one status pin that can be used to minimize the system write cycle. These signals are available on the I/O port bits DQ7 or DQ6 of the memory during programming cycle only, or as the RB signal on a separate pin. DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 DP TB PLTS Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Figure 4. Status Bit Assignment DP = Data Polling TB = Toggle Bit PLTS = Page Load Timer Status Data Polling bit (DQ7). During the internal write cycle, any attempt to read the last byte written will produce on DQ7 the complementary value of the previously latched bit. Once the write cycle is fin- ished the true logic value appears on DQ7 in the read cycle. Toggle bit (DQ6). The M28C64C offers another way for determining when the internal write cycle is completed. Duringthe internal Erase/Write cycle, DQ6 will toggle from ”0” to ”1” and ”1” to ”0” (the first read value is ”0”) on subsequent attempts to read any address in the memory. When the internal cycle is completed the toggling will stop and the device will be accessible for a new Read or Write operation. Page Load Timer Status bit (DQ5). In the Page Write mode data may be latched by E or W up to 100 µs after the previous byte. Up to 32 bytes may be input. The Data output (DQ5) indicates the status of the internal Page Load Timer. DQ5 may be read by asserting Output Enable Low (tPLTS). DQ5 Low indicates the timer is running, High indicates time-out after which the write cycle will start and no new data may be input. Ready/Busy pin. The RB pin provides a signal at its open drain output which is low during the erase/write cycle, but which is released at the completion of the programming cycle. 4/15 M28C64C, M28C64X |
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