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TMX320F28334PGFA Datasheet(PDF) 9 Page - Texas Instruments |
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TMX320F28334PGFA Datasheet(HTML) 9 Page - Texas Instruments |
9 / 170 page TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 Digital Signal Controllers (DSCs) SPRS439C – JUNE 2007 – REVISED FEBRUARY 2008 4-18 XINTF Configuration and Control Register Mapping ........................................................................ 103 6-1 TMS320F28335/F28235 Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT .................. 111 6-2 TMS320F28334/F28234 Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT .................. 112 6-3 Typical Current Consumption by Various Peripherals (at 150 MHz) ..................................................... 113 6-4 Clocking and Nomenclature (150-MHz devices) ............................................................................ 117 6-5 Clocking and Nomenclature (100-MHz devices) ............................................................................ 117 6-6 Input Clock Frequency .......................................................................................................... 118 6-7 XCLKIN Timing Requirements - PLL Enabled ............................................................................... 118 6-8 XCLKIN Timing Requirements - PLL Disabled .............................................................................. 118 6-9 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ....................................................... 118 6-10 Power Management and Supervisory Circuit Solutions .................................................................... 119 6-11 Reset (XRS) Timing Requirements ........................................................................................... 121 6-12 General-Purpose Output Switching Characteristics ......................................................................... 122 6-13 General-Purpose Input Timing Requirements ............................................................................... 123 6-14 IDLE Mode Timing Requirements ............................................................................................. 125 6-15 IDLE Mode Switching Characteristics ......................................................................................... 125 6-16 STANDBY Mode Timing Requirements ...................................................................................... 125 6-17 STANDBY Mode Switching Characteristics ................................................................................. 126 6-18 HALT Mode Timing Requirements ............................................................................................ 126 6-19 HALT Mode Switching Characteristics ....................................................................................... 127 6-20 ePWM Timing Requirements ................................................................................................... 128 6-21 ePWM Switching Characteristics .............................................................................................. 128 6-22 Trip-Zone input Timing Requirements ........................................................................................ 128 6-23 High Resolution PWM Characteristics at SYSCLKOUT = (60 - 150 MHz) .............................................. 129 6-24 Enhanced Capture (eCAP) Timing Requirement ............................................................................ 129 6-25 eCAP Switching Characteristics ............................................................................................... 129 6-26 Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements .................................................... 129 6-27 eQEP Switching Characteristics ............................................................................................... 129 6-28 External ADC Start-of-Conversion Switching Characteristics .............................................................. 129 6-29 External Interrupt Timing Requirements ...................................................................................... 130 6-30 External Interrupt Switching Characteristics ................................................................................. 130 6-31 I2C Timing ....................................................................................................................... 131 6-32 SPI Master Mode External Timing (Clock Phase = 0) ...................................................................... 132 6-33 SPI Master Mode External Timing (Clock Phase = 1) ...................................................................... 134 6-34 SPI Slave Mode External Timing (Clock Phase = 0) ........................................................................ 135 6-35 SPI Slave Mode External Timing (Clock Phase = 1) ........................................................................ 136 6-36 Relationship Between Parameters Configured in XTIMING and Duration of Pulse .................................... 137 6-37 XINTF Clock Configurations .................................................................................................... 139 6-38 External Interface Read Timing Requirements .............................................................................. 141 6-39 External Interface Read Switching Characteristics .......................................................................... 141 6-40 External Interface Write Switching Characteristics .......................................................................... 142 List of Tables 9 |
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