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TMX320F28232ZJZA Datasheet(PDF) 8 Page - Texas Instruments |
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TMX320F28232ZJZA Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 170 page  TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 Digital Signal Controllers (DSCs) SPRS439C – JUNE 2007 – REVISED FEBRUARY 2008 List of Tables 2-1 F2833x Hardware Features ..................................................................................................... 15 2-2 F2823x Hardware Features ..................................................................................................... 16 2-3 Signal Descriptions ............................................................................................................... 26 3-1 Addresses of Flash Sectors in F28335/F28235 .............................................................................. 40 3-2 Addresses of Flash Sectors in F28334/F28234 ............................................................................... 40 3-3 Addresses of Flash Sectors in F28332/F28232 ............................................................................... 40 3-4 Handling Security Code Locations .............................................................................................. 41 3-5 Wait-states ......................................................................................................................... 42 3-6 Boot Mode Selection .............................................................................................................. 45 3-7 Peripheral Frame 0 Registers .................................................................................................. 49 3-8 Peripheral Frame 1 Registers ................................................................................................... 50 3-9 Peripheral Frame 2 Registers ................................................................................................... 50 3-10 Peripheral Frame 3 Registers ................................................................................................... 50 3-11 Device Emulation Registers ..................................................................................................... 51 3-12 PIE Peripheral Interrupts ........................................................................................................ 54 3-13 PIE Configuration and Control Registers ...................................................................................... 55 3-14 External Interrupt Registers ...................................................................................................... 56 3-15 PLL, Clocking, Watchdog, and Low-Power Mode Registers ................................................................ 58 3-16 PLLCR Bit Descriptions .......................................................................................................... 60 3-17 CLKIN Divide Options ............................................................................................................ 60 3-18 Possible PLL Configuration Modes ............................................................................................. 60 3-19 Low-Power Modes ................................................................................................................ 62 4-1 CPU-Timers 0, 1, 2 Configuration and Control Registers ................................................................... 66 4-2 ePWM Control and Status Registers ........................................................................................... 68 4-3 eCAP Control and Status Registers ............................................................................................ 71 4-4 eQEP Control and Status Registers ............................................................................................ 73 4-5 ADC Registers ..................................................................................................................... 77 4-6 McBSP Register Summary ...................................................................................................... 81 4-7 3.3-V eCAN Transceivers ....................................................................................................... 83 4-8 CAN Register Map ............................................................................................................... 86 4-9 SCI-A Registers .................................................................................................................. 88 4-10 SCI-B Registers .................................................................................................................. 88 4-11 SCI-C Registers .................................................................................................................. 89 4-12 SPI-A Registers ................................................................................................................... 92 4-13 I2C-A Registers .................................................................................................................... 95 4-14 GPIO Registers ................................................................................................................... 97 4-15 GPIO-A Mux Peripheral Selection Matrix ..................................................................................... 98 4-16 GPIO-B Mux Peripheral Selection Matrix ..................................................................................... 99 4-17 GPIO-C Mux Peripheral Selection Matrix .................................................................................... 100 List of Tables 8 Submit Documentation Feedback |
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