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M27V160-150F6TR Datasheet(PDF) 9 Page - STMicroelectronics |
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M27V160-150F6TR Datasheet(HTML) 9 Page - STMicroelectronics |
9 / 15 page 9/15 M27V160 PRESTO III Programming Algorithm The PRESTO III Programming Algorithm allows the whole array to be programed with a guaran- teed margin in a typical time of 52.5 seconds. Pro- gramming with PRESTO III consists of applying a sequence of 50 µs program pulses to each word until a correct verify occurs (see Figure 9). During programing and verify operation a MAR- GIN MODE circuit is automatically activated to guarantee that each cell is programed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE at VCC much higher than 3.6V provides the necessary margin to each pro- grammed cell. Program Inhibit Programming of multiple M27V160s in parallel with different data is also easily accomplished. Ex- cept for E, all like inputs including G of the parallel M27V160 may be common. A TTL low level pulse applied to a M27V160’s E input and VPP at 12.5V, will program that M27V160. A high level E input in- hibits the other M27V160s from being pro- grammed. Program Verify A verify (read) should be performed on the pro- grammed bits to determine that they were correct- ly programmed. The verify is accomplished with E at VIH and G at VIL,VPP at 12.5V and VCC at 6.25V. Figure 8. Programming and Verify Modes AC Waveforms tAVEL VALID AI00744 A0-A19 Q0-Q15 BYTEVPP VCC G DATA IN DATA OUT E tQVEL tVPHAV tVCHAV tEHQX tELEH tGLQV tQXGL tGHQZ tGHAX PROGRAM VERIFY Figure 9. Programming Flowchart AI00901B n= 0 Last Addr VERIFY E= 50 µs Pulse ++n =25 ++ Addr VCC = 6.25V, VPP = 12.5V FAIL CHECK ALL WORDS BYTEVPP =VIH 1st: VCC =5V 2nd: VCC =3V YES NO YES NO YES NO |
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