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DETAILED DESCRIPTION

OPERATION

SOFT START-UP

OVERCURRENT PROTECTION

UNDERVOLTAGE LOCKOUT (UVLO)

THERMAL SHUTDOWN

ENABLE AND SHUTDOWN

TPS61170

SLVS789A – NOVEMBER 2007 – REVISED FEBRUARY 2008

The TPS61170 integrates a 40-V low side FET for up to 38-V output voltages. The device regulates the output

with current mode PWM (pulse width modulation) control. The switching frequency of PWM is fixed at 1.2MHz.

The PWM control circuitry turns on the switch at the beginning of each switching cycle. The input voltage is

applied across the inductor and stores the energy as inductor current ramps up. During this portion of the

switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the

threshold set by the error amplifier output, the power switch turns off and the external Schottky diode is forward

biased. The inductor transfers stored energy to replenish the output capacitor and supply the load current. This

operation repeats in every switching cycle. As shown in the block diagram, the duty cycle of the converter is

determined by the PWM control comparator which compares the error amplifier output and the current signal.

A ramp signal from oscillator is added to the current ramp. This slope compensation is to avoid sub-harmonic

oscillation that is intrinsic to the current mode control at duty cycle higher than 50%. The feedback loop regulates

the FB pin to a reference voltage through an error amplifier. The output of the error amplifier is connected to the

COMP pin. An external RC compensation network is connected to the COMP pin to optimize the feedback loop

for stability and transient response.

Soft-start circuitry is integrated into the IC to avoid a high inrush current during start-up. After the device is

enabled by a logic high signal on the CTRL pin, the FB pin reference voltage ramps up in 32 steps, each step

takes 213

µs. This ensures that the output voltage rises slowly to reduce inrush current. Additionally, for the first

5msec after the COMP voltage ramps, the current limit of the PWM switch is set to half of the normal current limit

spec. Therefore, during this period the input current is kept below 700mA (typical). See the start-up waveform for

a typical example, Figure 11.

TPS61170 has a cycle-by-cycle overcurrent limit feature that turns off the power switch once the inductor current

reaches the overcurrent limit. The PWM circuitry resets itself at the beginning of the next switch cycle. During an

over-current event, this results in a decrease of output voltage with respect to load. The current limit threshold as

well as input voltage, output voltage, switching frequency and inductor value determine the maximum available

output current. Larger inductor values increases the current output capability because of the reduced current

ripple. See the APPLICATION INFORMATION section for the output current calculation.

An undervoltage lockout prevents mis-operation of the device at input voltages below typical 2.2V. When the

input voltage is below the undervoltage threshold, the device remains off and the internal switch FET is turned

off. The undervoltage lockout threshold is set below minimum operating voltage of 3V to avoid any transient VIN

dip triggering the UVLO and causing the device to reset. For the input voltages between UVLO threshold and 3V,

the device maintains its operation, but the specifications are not ensured.

An internal thermal shutdown turns off the device when the typical junction temperature of 160

°C is exceeded.

The IC restarts when the junction temperature drops by 15

°C.

The TPS61170 enters shutdown when the CTRL voltage is less than 0.4V for more than 2.5ms. In shutdown, the

input supply current for the device is less than 1

µA (max). The CTRL pin has an internal 800kΩ pull down

resistor to disable the device when the pin is left unconnected.

8

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