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M27V160-200F1TR Datasheet(PDF) 5 Page - STMicroelectronics |
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M27V160-200F1TR Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 15 page 5/15 M27V160 Table 7. Read Mode DC Characteristics (1) (TA = 0 to 70°C or –40 to 85°C; VCC = 3.3V ± 10%; VPP =VCC) Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V. Symbol Parameter Test Condition Min Max Unit ILI Input Leakage Current 0V ≤ VIN ≤ VCC ±1 µA ILO Output Leakage Current 0V ≤ VOUT ≤ VCC ±10 µA ICC Supply Current E=VIL,G= VIL,IOUT = 0mA, f = 8MHz, VCC ≤ 3.6V 30 mA E=VIL,G= VIL,IOUT = 0mA, f = 5MHz, VCC ≤ 3.6V 20 mA ICC1 Supply Current (Standby) TTL E= VIH 1mA ICC2 Supply Current (Standby) CMOS E> VCC –0.2V, VCC ≤ 3.6V 60 µA IPP Program Current VPP =VCC 10 µA VIL Input Low Voltage –0.3 0.2VCC V VIH (2) Input High Voltage 0.7VCC VCC +1 V VOL Output Low Voltage IOL = 2.1mA 0.4 V VOH Output High Voltage TTL IOH = –400µA 2.4 V System Considerations The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the supplies to the devices. The supply current ICC has three segments of importance to the system designer: the standby current, the active current and the transient peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the ca- pacitive and inductive loading of the device out- puts. The associated transient voltage peaks can be suppressed by complying with the two line out- put control and by properly selected decoupling capacitors. It is recommended that a 0.1 µF ceram- ic capacitor is used on every device between VCC and VSS. This should be a high frequency type of low inherent inductance and should be placed as close as possible to the device. In addition, a 4.7 µF electrolytic capacitor should be used be- tween VCC and VSS for every eight devices. This capacitor should be mounted near the power sup- ply connection point. The purpose of this capacitor is to overcome the voltage drop caused by the in- ductive effects of PCB traces. |
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