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M27256-20F1 Datasheet(PDF) 7 Page - STMicroelectronics |
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M27256-20F1 Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 10 page tAVEL VALID AI00759 A0-A14 Q0-Q7 VPP VCC G DATA IN DATA OUT E tQVEL tVPHEL tVCHEL tEHQX tELEH tGLQV tQXGL tGHQZ tGHAX PROGRAM VERIFY Figure 6. Programming and Verify Modes AC Waveforms AI00774B n = 1 Last Addr VERIFY E = 1ms Pulse ++n > 25 ++ Addr VCC = 6V, VPP = 12.5V FAIL CHECK ALL BYTES VCC = 5V, VPP = 5V YES NO YES NO YES NO E = 3ms Pulse by n Figure 7. Programming Flowchart to a particular M27256 location), before a correct verify occurs. Up to 25 one-millisecond pulses per byte are provided for before the over program pulse is applied. The entire sequence of program pulses and byte verifications is performed at VCC = 6V and VPP = 12.5V. When the Fast Programming cycle has been com- pleted, all bytes should be compared to the original data with VCC = 5V and VPP = 5V. Program Inhibit Programming of multiple M27256s in parallel with different data is also easily accomplished. Except for E, all like inputs (including G) of the parallel M27256 may be common. A TTL low pulse applied to a M27256’s E input, with VPP = 12.5V, will program that M27256. A high level E input inhibits the other M27256s from being programmed. Program Verify A verify should be performed on the programmed bits to determine that they were correctly pro- grammed. The verify is accomplished with E = VIH, G = VIL and VPP = 12.5V. Optional Verify The optional verify may be performed instead of the verify mode. It is performed with G = VIL, E = VIL (as opposed t the standard verify which has E = DEVICE OPERATION (cont’d) M27256 7/10 |
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