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M25P10-VMN6T Datasheet(PDF) 1 Page - STMicroelectronics |
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M25P10-VMN6T Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 21 page 1/21 PRELIMINARY DATA June 2000 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. M25P10 1 Mbit Low Voltage Paged Flash Memory With 20 MHz Serial SPI Bus Interface s 1 Mbit PAGED Flash Memory s 128 BYTE PAGE PROGRAM IN 3 ms TYPICAL s 256 Kbit SECTOR ERASE IN 1 s TYPICAL s BULK ERASE IN 2 s TYPICAL s SINGLE 2.7 V to 3.6 V SUPPLY VOLTAGE s SPI BUS COMPATIBLE SERIAL INTERFACE s 20 MHz CLOCK RATE AVAILABLE s SUPPORTS POSITIVE CLOCK SPI MODES s DEEP POWER DOWN MODE (1 µA TYPICAL) s ELECTRONIC SIGNATURE s 10,000 ERASE/PROG CYCLES PER SECTOR s 20 YEARS DATA RETENTION s –40 TO 85°C TEMPERATURE RANGE DESCRIPTION The M25P10 is an 1 Mbit Paged Flash Memory fabricated with STMicroelectronics High Endurance CMOS technology. The memory is accessed by a simple SPI bus compatible serial interface. The bus signals are a serial clock input (C), a serial data input (D) and a serial data output (Q). The device connected to the bus is selected when the chip select input (S) goes low. Data is clocked in during the low to high transition of clock C, data Figure 1. Logic Diagram AI03744 S VCC M25P10 HOLD VSS W Q C D Table 1. Signal Names C Serial Clock D Serial Data Input Q Serial Data Output S Chip Select W Write Protect HOLD Hold VCC Supply Voltage VSS Ground SO8 (MN) 150 mil width 8 1 SO8 (MW) 200 mil width 8 1 |
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