M58LR256KB855 datasheet(5/110 Pages) NUMONYX

Part #	M58LR256KB855

Description	128 or 256 Mbit (횞16, multiple bank, multilevel interface, burst) 1.8 V supply Flash memories

Download	110 Pages

Scroll/Zoom	100%

Manufacturer	NUMONYX [Numonyx B.V]

Direct Link	http://www.numonyx.com

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5 / 110 page

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

List of tables

5/110

List of tables

Table 1.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 2.

M58LR128KT/B bank architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 3.

M58LR256KT/B bank architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 4.

Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 5.

Command codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 6.

Standard commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 7.

Factory commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 8.

Electronic signature codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 9.

Protection Register locks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 10.

Status Register bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 11.

X latency settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 12.

Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Table 13.

Burst type definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Table 14.

Dual operations allowed in other banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Table 15.

Dual operations allowed in same bank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Table 16.

Dual operation limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Table 17.

Lock status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Table 18.

Program/erase times and endurance cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Table 19.

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Table 20.

Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Table 21.

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Table 22.

DC characteristics - currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Table 23.

DC characteristics - voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Table 24.

Asynchronous read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Table 25.

Synchronous read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Table 26.

Write AC characteristics, Write Enable controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Table 27.

Write AC characteristics, Chip Enable controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Table 28.

Reset and power-up AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Table 29.

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Table 30.

M58LR128KT - Parameter bank block addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Table 31.

M58LR128KT - main bank base addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Table 32.

M58LR128KT - block addresses in main banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Table 33.

M58LR256KT - parameter bank block addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Table 34.

M58LR256KT - main bank base addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Table 35.

M58LR256KT - block addresses in main banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Table 36.

M58LR128KB - parameter bank block addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Table 37.

M58LR128KB - main bank base addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Table 38.

M58LR128KB - block addresses in main banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Table 39.

M58LR256KB - parameter bank block addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Table 40.

M58LR256KB - main bank base addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Table 41.

M58LR256KB - block addresses in main banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Table 42.

Query structure overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Table 43.

CFI query identification string . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Table 44.

CFI query system interface information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Table 45.

Device geometry definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Table 46.

Primary algorithm-specific extended query table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Table 47.

Protection Register information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Table 48.

Burst read information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

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