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M39P0R9070E2ZADE Datasheet(PDF) 11 Page - Numonyx B.V |
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M39P0R9070E2ZADE Datasheet(HTML) 11 Page - Numonyx B.V |
11 / 24 page M39P0R8070E2, M39P0R9070E2 Signal descriptions 11/24 2.5 Flash memory Output Enable (GF) The Output Enable input controls data outputs during the Bus Read operation of the memory. 2.6 Flash memory Write Enable (WF) The Write Enable input controls the Bus Write operation of the Flash memory’s Command Interface. The data and address inputs are latched on the rising edge of Chip Enable or Write Enable whichever occurs first. 2.7 Flash memory Write Protect input (WPF) Write Protect is an input that gives an additional hardware protection for each block. When Write Protect is at VIL, the Lock-Down is enabled and the protection status of the Locked- Down blocks cannot be changed. When Write Protect is at VIH, the Lock-Down is disabled and the Locked-Down blocks can be locked or unlocked. (See M58PR512J datasheet for details). 2.8 Flash memory Reset (RPF) The Reset input provides a hardware reset of the memory. When Reset is at VIL, the memory is in reset mode: the outputs are high impedance and the current consumption is reduced to the Reset Supply Current IDD2 (Refer to the M58PRxxxJ datasheet, for the value of IDD2). After Reset all blocks are in the Locked state and the Configuration Register is reset. When Reset is at VIH, the device is in normal operation. Exiting reset mode the device enters asynchronous read mode, but a negative transition of Chip Enable or Latch Enable is required to ensure valid data outputs. The Reset pin can be interfaced with 3V logic without any additional circuitry. It can be tied to VRPH (refer to M58PRxxxJ datasheet). 2.9 Flash memory Deep Power-Down (DPDF) The Deep Power-Down input is used to put the Flash memory in Deep Power-Down mode. When the Flash memory is in Standby mode and the Enhanced Configuration Register bit ECR15 is set, asserting the Deep Power-Down input will cause the memory to enter the Deep Power-Down mode. When the device is in the Deep Power-Down mode, the memory cannot be modified and the data is protected. The polarity of the DPDF pin is determined by ECR14. The Deep Power-Down input is active Low by default. |
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