M25PE80-VMW6TP datasheet(6/66 Pages) NUMONYX

Part #	M25PE80-VMW6TP

Description	8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout

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Manufacturer	NUMONYX [Numonyx B.V]

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Description

M25PE80

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Description

The M25PE80 is an 8-Mbit (1 Mb ×8) serial paged flash memory accessed by a high speed

SPI-compatible bus.

The memory can be written or programmed 1 to 256 bytes at a time, using the page write or

page program instruction. The page write instruction consists of an integrated page erase

cycle followed by a page program cycle.

The memory is organized as 16 sectors that are further divided up into 16 subsectors each

(256 subsectors in total). Each sector contains 256 pages and each subsector contains 16

pages. Each page is 256-byte wide. Thus, the whole memory can be viewed as consisting

of 4096 pages, or 1 048 576 bytes.

The memory can be erased a page at a time, using the page erase instruction, a subsector

at a time, using the subsector erase instruction, a sector at a time, using the sector erase

instruction, or as a whole, using the bulk erase instruction.

The memory can be write protected by either hardware or software using a mix of volatile

and non-volatile protection features, depending on the application needs. The protection

granularity is of 64 Kbytes (sector granularity).

Important note

This datasheet details the functionality of the M25PE80 devices, based on the previous T7Y

process or based on the current T9HX process (available since June 2007). Delivery of

parts operating with a maximum clock rate of 75 MHz starts from week 8 of 2008.

What are the changes?

The M25PE80 in T9HX process offers the following additional features:

●

the whole memory array is partitioned into 4-Kbyte subsectors

●

two new instructions: write status register (WRSR) and 4-Kbyte subsector erase (SSE)

●

Status register: 4 bits can be written (BP0, BP1, BP2, SRWD)

●

WP input (pin 3): write protection limits are extended, depending on the value of the

BP0, BP1, BP2, SRWD bits. The WP write protection remains the same if bits (BP2,

BP1, BP0) are set to (0, 0, 1)

●

smaller die size allowing assembly into an SO8N package.

Suppressed feature:

●

The write protection (defined by the WL and LD lock bits) of the 4-Kbyte subsectors in

the top and bottom sectors is no longer offered.

For more details please refer to PCNMPG062148.

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STMicroelectronics	M25PE80-VMW6TP	507Kb / 61P	8 Mbit, low-voltage, Page-Erasable Serial Flash memory with Byte alterability, 50MHz SPI bus, standard pinout

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Manufacturer	Part #	Datasheet	Description
Numonyx B.V	M25PE16	1Mb / 58P	16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout
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M25PE80-VMW6TP Datasheet(PDF) 6 Page - Numonyx B.V

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