CYD01S18V-133BBC datasheet(3/26 Pages) CYPRESS

Part #	CYD01S18V-133BBC

Description	FLEx18??3.3V 64K/128K/256K/512K x 18 Synchronous Dual-Port RAM

Download	26 Pages

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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3 / 26 page

CYD01S18V/CYD02S18V

CYD04S18V/CYD09S18V

Document #: 38-06077 Rev. *C

Page 3 of 26

Pin Configurations

256-ball BGA Top View

CYD01S18V/CYD02S18V

CYD04S18V/CYD09S18V

12

3

4

5

6

7

8

9

10

11

12

1314

15

16

A

NC

DQ17L

DQ16L

DQ13L

DQ12L

DQ9L

DQ9R

DQ12R

DQ13R

DQ16R

DQ17R

NC

B

NC

DQ15L

DQ14L

DQ11L

DQ10L

DQ10R

DQ11R

DQ14R

DQ15R

NC

C

NC

RETL

[2,3]

INTL

NC

[2,5]

NC

[2,5]

REVL

[2,4]

TRST

[2,5]

MRST

NC

[2,5]

NC

[2,5]

NC

[2,5]

INTR

RETR

[2,3]

NC

D

A0L

A1L

WRPL

[2,3]

VREFL

[2,4]

FTSELL

[2,3]

LowSPDL

[2,4]

VSS

VTTL

VSS

LowSPDR

[2,4]

FTSELR

[2,3]

VREFR

[2,4]

WRPR

[2,3]

A1R

A0R

E

A2L

A3L

CE0L

[10]

CE1L

[9]

VDDIOL

VCORE

VDDIOR

CE1R

[9]

CE0R

[10]

A3R

A2R

F

A4L

A5L

CNTINTL

[11]

NC

VDDIOL

VSS

VDDIOR

NC

CNTINTR

[11]

A5R

A4R

G

A6L

A7L

BUSYL

[2,5]

NC

REVL

[2,3]

VSS

VDDIOR

NC

BUSYR

[2,5]

A7R

A6R

H

A8L

A9L

CL

VTTL

VCORE

VSS

VCORE

VTTL

CR

A9R

A8R

J

A10L

A11L

VSS

PortSTD1L

[2,4]

VCORE

VSS

VCORE

PortSTD1R

[2,4]

VSS

A11R

A10R

K

A12L

A13L

OEL

BE1L

VDDIOL

VSS

VDDIOR

BE1R

OER

A13R

A12R

L

A14L

A15L

ADSL

[10]

BE0L

VDDIOL

VSS

VDDIOR

BE0R

ADSR

[10]

A15R

A14R

M

A16L

[6]

A17L

[7]

RWL

REVL

[2,4]

VDDIOL

VCORE

VDDIOR

REVR

[2,4]

RWR

A17R

[7]

A16R

[6]

N

A18L

[8]

NC

CNT/

MSKL

[9]

VREFL

[2,4]

PortSTD0L

[2,4]

READYL

[2,5]

REVL

[2,3]

VTTL

REVR

[2,3]

READYR

[2,5]

PortSTD0R

[2,4]

VREFR

[2,4]

CNT/

MSKR

[9]

NC

A18R

[8]

P

NC

CNTENL

[10]

CNTRSTL

[9]

NC

[2,5]

NC

[2,5]

TCK

TMS

TDO

TDI

NC

[2,5]

NC

[2,5]

CNTRSTR

[9]

CNTENR

[10]

NC

R

NC

DQ6L

DQ5L

DQ2L

DQ1L

DQ1R

DQ2R

DQ5R

DQ6R

NC

T

NC

DQ8L

DQ7L

DQ4L

DQ3L

DQ0L

DQ0R

DQ3R

DQ4R

DQ7R

DQ8R

NC

Notes:

2. This ball will represent a next generation FLEx18-E Dual-Port feature. For more information about this feature, contact Cypress Sales.

3. Connect this ball to VDDIO. For more information about this next generation FLEx18-E Dual-Port feature contact Cypress Sales.

4. Connect this ball to VSS. For more information about this next generation FLEx18-E Dual-Port feature, contact Cypress Sales.

5. Leave this ball unconnected. For more information about this feature, contact Cypress Sales.

6. Leave this ball unconnected for a 64K x 18.

7. Leave this ball unconnected for a 128K x 18 and 64K x 18.

8. Leave this ball unconnected for a 256K x 18, 128K x 18 and 64K x 18.

9. These balls are not applicable for CYD09S18V device. They need to be tied to VDDIO.

10. These balls are not applicable for CYD09S18V device. They need to be tied to VSS.

11. These balls are not applicable for CYD09S18V device. They need to be no connected.

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CYD01S18V-133BBC Datasheet(PDF) 3 Page - Cypress Semiconductor

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