CY2545
CY2547
Quad PLL Programmable Spread Spectrum
Clock Generator with Serial I2
C Interface
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
, CA 95134-1709
•
408-943-2600
Document #: 001-13196 Rev. *A
Revised October 05, 2007
Features
■ Four fully integrated phase locked loops (PLLs)
■ Input frequency range
❐ External crystal: 8 to 48 MHz
❐ External reference: 8 to 166 MHz clock
■ Wide operating output frequency range
❐ 3 to 166 MHz
■ Serial programmable over 2-wire I
2C interface
■ Programmable spread spectrum with center and down
spread option and Lexmark and Linear modulation profiles
■ VDD supply voltage options:
❐ 2.5V, 3.0V, and 3.3V for CY2545
❐ 1.8V for CY2547
■ Selectable output clock voltages independent of VDD supply:
❐ 2.5V, 3.0V, and 3.3V for CY2545
❐ 1.8V for CY2547
■ Power down, output enable, or frequency select features
■ Low jitter, high accuracy outputs
■ Ability to synthesize nonstandard frequencies with
Fractional-N capability
■ Up to eight clock outputs with programmable drive strength
■ Glitch-free outputs while frequency switching
■ 24-pin QFN package
■ Commercial and industrial temperature ranges
Benefits
■ Multiple high performance PLLs allow synthesis of unrelated
frequencies
■ Nonvolatile programming for personalization of PLL
frequencies, spread spectrum characteristics, drive strength,
crystal load capacitance, and output frequencies
■ Application specific programmable EMI reduction using
Spread Spectrum for clocks
■ Programmable PLLs for system frequency margin tests
■ Meets critical timing requirements in complex system
designs
■ Suitability for PC, consumer, portable, and networking appli-
cations
■ Capable of Zero PPM frequency synthesis error
■ Uninterrupted system operation during clock frequency
switch
■ Application compatibility in standard and low power systems
Logic Block Diagram
OSC
MUX
and
Control
Logic
I2C
PLL1
PLL2
PLL3
(SS)
PLL4
(SS)
Output
Dividers
and
Drive
Strength
Control
CLK1
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
Crossbar
Switch
CLKIN/RST
FS
SSON
XOUT
XIN/
EXCLKIN
PD#/OE
SCL
SDA
Bank
1
Bank
2
Bank
3
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