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Factory Programmable Quad PLL Clock Generator with VCXO
CY244/45ZXC
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
, CA 95134
•
408-943-2600
Document #: 38-07748 Rev. **
Revised March 7, 2005
Features
• Fully integrated phase-locked loops (PLLs)
• Selectable Output Frequency
• Programmable Output Frequencies
• Output Frequency Range of 5–166 MHz
• Input Frequency Range
— Crystal: 10–30 MHz
— External Reference: 1–100 MHz
• Analog VCXO
• 16-/20-pin TSSOP packages
• 3.3V operation
Benefits
• Meets most Digital Set Top Box, DVD Recorder and DTV
application requirements
• Multiple high-performance PLLs allow synthesis of
unrelated frequencies
• Integration eliminates the need for external loop filter
components
• Meets critical timing requirements in complex system
designs
• Enables application compatibility
• Complete VCXO solution with ±120 ppm (minimum pull
range)
Block Diagram
Pin Configuration
CY245ZXC
1
2
3
4
5
6
7
813
14
15
16
17
18
19
20
XIN
FS2
AVDD
VIN
AVSS
OE/PD
CLKA
VSS
VDD
CLKD
CLKE
VSS
CLKF
CLKG
VDD
XOUT
CLKB
FS0
FS1
CLKC
912
10
11
20-Pin TSSOP
VCXO
PLL1
PLL2
PLL3
PLL4
CLKA
CLKB
CLKC
CLKD
CLKE
CLKF
CLKG
Divider
&
Multiplexer
XIN
XOUT
Select
Logic
FS0/1/2
OE
VIN
CY244ZXC
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
XIN
AVDD
VIN
AVSS
CLKA/OE
VSS
CLKB
FS1
CLKC
FS0
VDD
VSS
CLKF
CLKG
VDD
XOUT
16-Pin TSSOP