8 / 42 page
CY8C42323/CY8C42423
PRELIMINARY
CY8C42123/CY8C42223
Document 38-12034 Rev. *C
Page 8 of 42
6.0
Pin Assignment
This section lists, describes, and illustrates all Power PSoC device pins and pinout configurations. For up-to-date ordering, pinout,
and packaging information, refer to the individual PSoC device’s data sheet or go to http://www.cypress.com/psoc.
6.1
Pinouts
The PSoC devices are available in a variety of packages. Refer to the following information for details on individual devices. Every
port pin (labeled with a “P”) in the following tables and illustrations is capable of digital IO.
6.1.1
8-Pin SOIC Part Pinouts
The 8-pin SOIC part is for the CY8C42123 PSoC device.
8-Pin Part Pinout (SOIC)
Pin
No.
Name
Description
CY8C42123 PSoC Device
1
HVO
HVO
GD1
High Side Gate Driver 1
2
IO
I
P0[1]
3
IO
I
P1[1]
I2C Clock*
4
Power
Vss
Ground Connection
5
IO
I
P1[0]
I2C Data*
6
IO
I
P0[0]
7
HVO
HVI
VS0
High Voltage Sense 0, High Voltage Out-
put 0
8
Power
HVdd
Supply Voltage
LEGEND I = Input 5V Only, O = Output 5V Only, HV = High Voltage.
* These are the ISSP pins, which are not HighZ at POR (Power On Reset). See the Power PSoC Mixed-Signal Array Technical Reference Manual for details.
SOIC
1
2
3
4
8
7
6
5
HVO[0],VS0
P0[0]
P1[0] I2 C*
GD1
P0 [1 ]
I2C* P1[1]
Vss
HV
dd
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
