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CY8C20180
Document Number: 001-17346 Rev. *C
Page 3 of 12
Pinouts
Figure 1. Pin Diagram - 16 Pin COL
Table 1. Pin Definitions - 16 Pin COL
Pin Number
Name
Description
1
GP0[0]
Configurable as CapSense or GPIO
2
GP0[1]
Configurable as CapSense or GPIO
3I2C SCL
I2C clock
4I2C SDA
I2C data
5
GP1[0]
Configurable as CapSense or GPIO
6
GP1[1]
Configurable as CapSense or GPIO
7
VSS
Ground connection
8
GP1[2]
Configurable as CapSense or GPIO
9
GP1[3]
Configurable as CapSense or GPIO
10
GP1[4]
Configurable as CapSense or GPIO
11
XRES
Active HIGH external reset with internal pull down
12
GP0[2]
Configurable as CapSense or GPIO
13
VDD
Supply voltage
14
GP0[3]
Configurable as CapSense or GPIO
15
CSInt
Integrating Input.The external capacitance is required only if 5:1 SNR
cannot be achieved. Typical range is 10-100 nF.
16
GP0[4]
Configurable as CapSense or GPIO
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