CY7C63001C
CY7C63101C
Document #: 38-08026 Rev. *B
Page 3 of 28
6.0
Functional Description
The Cypress CY7C630/101C USB microcontrollers are
optimized for human-interface computer peripherals such as
a mouse, joystick, and gamepad. These USB microcontrollers
conform to the low-speed (1.5 Mbps) requirements of the USB
specification
version
1.1.
Each
microcontroller
is
a
self-contained unit with: a USB interface engine, USB trans-
ceivers, an 8-bit RISC microcontroller, a clock oscillator,
timers, and program memory. Each microcontroller supports
one USB device address and two endpoints.
The 6-MHz clock is doubled to 12 MHz to drive the microcon-
troller. A RISC architecture with 35 instructions provides the
best balance between performance and product cost.
6.1
Memory Organization
The memory in the USB Controller is organized into user
program memory in EPROM space and data memory in SRAM
space.
6.1.1
Program Memory Organization
The CY7C63001C and CY7C63101C each offer 4 Kbytes of
EPROM. The program memory space is divided into two
functional groups: interrupt vectors and program code.
The interrupt vectors occupy the first 16 bytes of the program
space. Each vector is 2 bytes long. After a reset, the Program
Counter points to location zero of the program space.
Figure 6-1 shows the organization of the Program Memory
Space.
6.1.2
Security Fuse Bit
The Cypress USB microcontroller includes a security fuse bit.
When the security fuse is programmed, the EPROM program
memory outputs 0xFF to the EPROM programmer, thus
protecting the user’s code.
CEXT
I/O
9
11
11
Connects to external R/C timing circuit for optional
‘suspend’ wakeup
D+
I/O
141616
USB data+
D–
I/O
131515
USB data–
VPP
–
8
10
10
Programming voltage supply, tie to ground during normal
operation
VCC
–
12
14
14
Voltage supply
VSS
–
799
Ground
4.0
Pin Definitions (continued)
Name
I/O
20-Pin
24-pin
Die Pad #
Description
5.0
Pin Description
Name
Description
VCC
1 pin. Connects to the USB power source or to a nominal 5V power supply. Actual VCC range can vary
between 4.0V and 5.25V.
VSS
1 pin. Connects to ground.
VPP
1 pin. Used in programming the on-chip EPROM. This pin should be tied to ground during normal operations.
XTALIN
1 pin. Input from an external ceramic resonator.
XTALOUT
1 pin. Return path for the ceramic resonator (leave unconnected if driving XTALIN from an external oscillator).
P0.0–P0.7,
P1.0–P1.7
16 pins. P0.0–P0.7 are the 8 I/O lines in Port 0. P1.0–P1.7 are the 8 I/O lines in Port 1. P1.0–P1.3 are
supported in the CY7C63001C. All I/O pins include bit-programmable pull-up resistors. However, the sink
current of each pin can be programmed to one of sixteen levels. Besides functioning as GPIO lines, each
pin can be programmed as an interrupt input. The interrupt is edge-triggered, with programmable polarity.
D+, D–
2 pins. Bidirectional USB data lines. An external pull-up resistor must be connected between the D pin and
VCC to select low-speed USB operation.
CEXT
1 pin. Open-drain output with Schmitt trigger input. The input is connected to a rising edge-triggered interrupt.
CEXT may be connected to an external RC to generate a wake-up from Suspend mode. See Section 6.4.
