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PRELIMINARY
CY7C6435x
CY7C64345, CY7C6431x
Document Number: 001-12394 Rev. *D
Page 7 of 26
32-Pin Part Pinout
Figure 4. CY7C64345 32-Pin enCoRe V USB Device
P0[1]
P2[5]
P2[3]
P2[1]
P1[7]
QFN
( Top View )
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
P1[5]
P1[1]
P0[0]
P2[6]
P3[0]
XRES
P2[4]
P2[2]
P2[0]
P3[2]
P1[3]
Table 2. 32-Pin Part Pinout (QFN)
Pin No.
Type
Name
Description
1
IOH
P0[1]
Digital IO
2
IO
P2[5]
Digital IO, Crystal Output (Xout)
3
IO
P2[3]
Digital IO, Crystal Input (Xin)
4
IO
P2[1]
Digital IO
5
IOHR
P1[7]
Digital IO, I2C SCL, SPI SS
6
IOHR
P1[5]
Digital IO, I2C SDA, SPI MISO
7
IOHR
P1[3]
Digital IO, SPI CLK
8
IOHR
P1[1](2)
Digital IO, ISSP CLK, I2C SCL, SPI MOSI
9
Power
Vss
Ground
10
IO
D+
USB PHY
11
IO
D–
USB PHY
12
Power
Vdd
Supply voltage
13
IOHR
P1[0](2)
Digital IO, ISSP DATA, I2C SDA, SPI CLK
14
IOHR
P1[2]
Digital IO
15
IOHR
P1[4]
Digital IO, optional external clock input (EXTCLK)
16
IOHR
P1[6]
Digital IO
17
Reset
XRES
Active high external reset with internal pull down
18
IO
P3[0]
Digital IO
19
IO
P3[2]
Digital IO
20
IO
P2[0]
Digital IO
21
IO
P2[2]
Digital IO
Note
2. These are the in-system serial programming (ISSP) pins, that are not High Z at power on reset (POR).
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