5 / 14 page
CY7C1041CV33
Document Number: 38-05134 Rev. *I
Page 5 of 14
Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Parameter
Description
Test Conditions
Max
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz, VCC = 3.3V
8
pF
COUT
Output Capacitance
8pF
Thermal Resistance
Tested initially and after any design or process changes that may affect these parameters.
Parameter
Description
Test Conditions
SOJ
TSOP II
FBGA
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA/JESD51
25.99
42.96
38.15
°C/W
Θ
JC
Thermal Resistance
(Junction to Case)
18.8
10.75
9.15
°C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms [3]
90%
10%
3.0V
GND
90%
10%
ALL INPUT PULSES
3.3V
OUTPUT
30 pF*
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
(b)
R 317
Ω
R2
351
Ω
Rise Time: 1 V/ns
Fall Time: 1 V/ns
30 pF*
OUTPUT
Z = 50
Ω
50
Ω
1.5V
(c)
(a)
3.3V
OUTPUT
5 pF
(d)
R 317
Ω
R2
351
Ω
10-ns devices:
12-, 15-, 20-ns devices:
High-Z characteristics:
Note
3. AC characteristics (except High-Z) for 10-ns parts are tested using the load conditions shown in Figure (a). All other speeds are tested using the Thevenin load shown
in Figure (b). High-Z characteristics are tested for all speeds using the test load shown in Figure (d).
[+] Feedback
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
