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DS3184 Datasheet(PDF) 8 Page - Dallas Semiconductor |
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DS3184 Datasheet(HTML) 8 Page - Dallas Semiconductor |
8 / 400 page DS3181/DS3182/DS3183/DS3184 8 LIST OF FIGURES Figure 1-1. LIU External Connections for a DS3/E3/STS-1 Port of a DS318x Device.............................................. 14 Figure 1-2. DS318x Functional Block Diagram ......................................................................................................... 14 Figure 2-1. Four-Port Unchannelized ATM over DS3/E3/CC52 Line Card ............................................................... 15 Figure 2-2. Four-Port Unchannelized HDLC over DS3/E3/CC52 Line Card.............................................................16 Figure 6-1. DS3/E3 ATM/Packet Mode ..................................................................................................................... 26 Figure 6-2. DS3/E3 ATM/Packet—OHM Mode ......................................................................................................... 27 Figure 6-3. DS3/E3 Internal Fractional ATM/Packet Mode ....................................................................................... 28 Figure 6-4. DS3/E3 External Fractional ATM/Packet Mode ...................................................................................... 29 Figure 6-5. DS3/E3 Flexible External Fractional Mode ............................................................................................. 30 Figure 6-6. DS3/E3 G.751 PLCP ATM Mode ............................................................................................................ 31 Figure 6-7. DS3/E3 G.751 PLCP ATM—OHM Mode ................................................................................................ 33 Figure 6-8. Clear-Channel ATM/Packet Modes......................................................................................................... 34 Figure 6-9. Clear-Channel ATM/Packet—OHM Mode .............................................................................................. 35 Figure 6-10. Clear-Channel Octet Aligned ATM/Packet—OHM Mode...................................................................... 36 Figure 7-1. HDB3/B3ZS/AMI LIU Mode..................................................................................................................... 38 Figure 7-2. HDB3/B3ZS/AMI Non-LIU Line Interface Mode...................................................................................... 39 Figure 7-3. UNI Line Interface Mode ......................................................................................................................... 40 Figure 7-4. UNI Line Interface—OHM Mode ............................................................................................................. 41 Figure 8-1. TX Line IO B3ZS Functional Timing Diagram......................................................................................... 66 Figure 8-2. TX Line IO HDB3 Functional Timing Diagram ........................................................................................ 67 Figure 8-3. RX Line IO B3ZS Functional Timing Diagram......................................................................................... 67 Figure 8-4. RX Line IO HDB3 Functional Timing Diagram........................................................................................ 68 Figure 8-5. TX Line IO UNI OHM Functional Timing Diagram .................................................................................. 68 Figure 8-6. TX Line IO UNI Octet Aligned OHM Functional Timing Diagram............................................................ 68 Figure 8-7. RX Line IO OHM UNI Functional Timing Diagram.................................................................................. 69 Figure 8-8. RX Line IO UNI Octet Aligned OHM Functional Timing Diagram ........................................................... 69 Figure 8-9. DS3 Framing Receive Overhead Port Timing......................................................................................... 69 Figure 8-10. E3 G.751 Framing Receive Overhead Port Timing .............................................................................. 70 Figure 8-11. E3 G.832 Framing Receive Overhead Port Timing .............................................................................. 70 Figure 8-12. DS3 Framing Transmit Overhead Port Timing...................................................................................... 70 Figure 8-13. E3 G.751 Framing Transmit Overhead Port Timing ............................................................................. 70 Figure 8-14. E3 G.832 Framing Transmit Overhead Port Timing ............................................................................. 71 Figure 8-15. DS3 PLCP Receive Overhead Port Timing........................................................................................... 71 Figure 8-16. E3 G.751 PLCP Receive Overhead Port Timing .................................................................................. 71 Figure 8-17. DS3 PLCP Transmit Overhead Port Timing.......................................................................................... 71 Figure 8-18. E3 G.751 PLCP Transmit Overhead Port Timing ................................................................................. 72 Figure 8-19. External (XFRAC) Transmit Fractional Timing...................................................................................... 72 Figure 8-20. External (XFRAC) Receive Fractional Timing....................................................................................... 72 Figure 8-21. Internal (IFRAC) Transmit Fractional Timing ........................................................................................ 73 Figure 8-22. Internal (IFRAC) Receive Fractional Timing ......................................................................................... 73 Figure 8-23. Transmit Flexible Fractional (FFRAC) Timing....................................................................................... 74 Figure 8-24. Receive Flexible Fractional (FFRAC) Timing........................................................................................ 74 Figure 8-25. UTOPIA Level 2 Transmit Cell Transfer Direct Mode ........................................................................... 75 Figure 8-26. UTOPIA Level 2 Receive Cell Transfer Direct Mode ............................................................................ 76 Figure 8-27. UTOPIA Level 2 Transmit Multiple Cell Transfer Polled Mode............................................................. 77 Figure 8-28. UTOPIA Level 2 Receive Multiple Cell Transfer Polled Mode.............................................................. 77 Figure 8-29. UTOPIA Level 2 Receive Unexpected Multiple Cell Transfer............................................................... 78 Figure 8-30. UTOPIA Level 3 Transmit Multiple Cell Transfer Direct Mode.............................................................. 78 Figure 8-31. UTOPIA Level 3 Transmit Multiple Cell Transfer Polled Mode............................................................. 79 Figure 8-32. UTOPIA Level 3 Receive Multiple Cell Transfer Direct Mode............................................................... 80 Figure 8-33. UTOPIA Level 3 Receive Multiple Cell Transfer Polled Mode.............................................................. 80 Figure 8-34. Transmit Multiple Packet Transfer to Different PHY ports (direct status mode) ................................... 81 Figure 8-35. POS-PHY Level 2 Receive Multiple Packet Transfer from Different PHY Ports/Devices(direct status mode)............................................................................................................ 82 Figure 8-36. POS-PHY Level 2 Transmit Multiple Packet Transfer to Different PHY Ports (polled status mode) .... 83 Figure 8-37. POS-PHY Level 2 Receive Multiple Packet Transfer (polled status mode).......................................... 84 Figure 8-38. POS-PHY Level 3 Transmit Multiple Packet Transfer In-Band Addressing.......................................... 85 |
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