DS1672

5 of 15

AC ELECTRICAL CHARACTERISTICS

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

NOTES

Fast mode

100

400

SCL Clock

Frequency

Standard mode

100

kHz

Fast mode

1.3

Bus Free Time

Between a STOP and

START Condition

Standard mode

4.7

µs

Fast mode

0.6

Hold Time

(Repeated) START

Condition

Standard mode

4.0

µs

6

Fast mode

1.3

LOW Period of SCL

Clock

Standard mode

4.7

µs

Fast mode

0.6

HIGH Period of SCL

Clock

Standard mode

4.0

µs

Fast mode

0.6

Setup Time for a

Repeated START

Condition

Standard mode

4.7

µs

Fast mode

0

0.9

Data Hold Time

Standard mode

0

µs

7, 8

Fast mode

100

Data Setup Time

Standard mode

250

ns

9

Fast mode

300

Rise Time of Both

SDA and SCL

Signals

Standard mode

1000

ns

10

Fast mode

300

Fall Time of Both

SDA and SCL

Signals

Standard mode

300

ns

10

Fast mode

0.6

Setup Time for STOP

Condition

Standard mode

4.0

µs

Capacitive Load for

Each Bus Line

400

pF

10

I/O Capacitance

10

pF

Note 6: After this period, the first clock pulse is generated.

order to bridge the undefined region of the falling edge of SCL.

automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW

line is released.