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PRELIMINARY
CY7C1012AV25
Document #: 38-05337 Rev. **
Page 5 of 9
tAW
Address Set-Up to Write End
6
7
8
ns
tHA
Address Hold from Write End
0
0
0
ns
tSA
Address Set-Up to Write Start
0
0
0
ns
tPWE
WE Pulse Width
6
7
8
ns
tSD
Data Set-Up to Write End
5
5.5
6
ns
tHD
Data Hold from Write End
0
0
0
ns
tLZWE
WE HIGH to Low Z[7]
3
3
3
ns
tHZWE
WE LOW to High Z[7]
5
5
6
ns
tBW
Byte Enable to End of Write
6
7
8
ns
Data Retention Waveform
AC Switching Characteristics Over the Operating Range (continued)[5]
Parameter
Description
-8
-10
-12
Unit
Min.
Max.
Min.
Max.
Min.
Max.
2.3V
2.3V
tCDR
VDR > 1.5V
DATA RETENTION MODE
tR
CE
VCC
Switching Waveforms
Read Cycle No. 1[11, 12]
Read Cycle No. 2 (OE Controlled)[2, 12, 13]
Notes:
11. Device is continuously selected. OE, CE = VIL.
12. WE is HIGH for read cycle.
13. Address valid prior to or coincident with CE transition LOW.
PREVIOUS DATA VALID
DATA VALID
tRC
tAA
tOHA
ADDRESS
DATA OUT
50%
50%
DATA VALID
tRC
tACE
tDOE
tLZOE
tLZCE
tPU
HIGH IMPEDANCE
tHZOE
tHZCE
tPD
HIGH
OE
CE
ICC
ISB
IMPEDANCE
ADDRESS
DATA OUT
VCC
SUPPLY
CURRENT