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CY7B933-155JC Datasheet(PDF) 10 Page - Cypress Semiconductor

Part # CY7B933-155JC
Description  HOTLink Transmitter/Receiver
Download  33 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7B933-155JC Datasheet(HTML) 10 Page - Cypress Semiconductor

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CY7B923
CY7B933
Document #: 38-02017 Rev. *E
Page 10 of 33
safety functions), the FOTO input can be asserted. While it is
possible to insure that the output state of the PECL drivers is
LOW (i.e., light is off) by sending all 0’s in Bypass mode, it is
often inconvenient to insert this level of control into the data
transmission channel, and it is impossible in Encoded mode.
FOTO is provided to simplify and augment this control function
(typically found in laser-based transmission systems). FOTO
will force OUTA+ and OUTB+ to go LOW, OUTA– and OUTB–
to go HIGH, while allowing OUTC± to continue to function
normally (OUTC is typically used as a diagnostic feedback and
cannot be disabled). This separation of function allows various
system configurations without undue load on the control
function or data channel logic.
Transmitter Serial Data Characteristics
The CY7B923 HOTLink Transmitter serial output conforms to
the requirements of the Fibre Channel specification. The serial
data output is controlled by an internal Phase-Locked Loop
that multiplies the frequency of CKW by ten (10) to maintain
the proper bit clock frequency. The jitter characteristics
(including both PLL and logic components) are shown below:
• Deterministic Jitter (Dj) < 35 ps (peak-peak). Typically
measured while sending a continuous K28.5 (C5.0).
• Random Jitter (Rj) < 175 ps (peak-peak). Typically
measured while sending a continuous K28.7 (C7.0).
Transmitter Test Mode Description
The CY7B923 Transmitter offers two types of test mode
operation, BIST mode and Test mode. In a normal system
application, the Built-In Self-Test (BIST) mode can be used to
check the functionality of the Transmitter, the Receiver, and
the link connecting them. This mode is available with minimal
impact on user system logic, and can be used as part of the
normal system diagnostics. Typical connections and timing
are shown in Figure 6.
Figure 5. HOTLink Connection Diagram
RX
SIG
9
24
21
20
VCC
Control
Config
and
Config
CY7B923
(Dj)
(Dh)
(Dg)
(Df)
(Di)
(De)
(Dd)
(Dc)
(Db)
(Da)
Transmitter
Coax or
Fiber
Fiber
TX
E
Signal Det.
Optional
Fiber Optic
Tx
Twisted Pair
Twisted Pair
Coax or
Fiber Optic
Rx
Fiber Optic
PECL Load
Tx PECL Load
Tx PECL Load
Transmission
Line
Termination
Status
Data
Data
Status
Control
and
CY7B933
(Qa)
Receiver
(Qb)
(Qh)
(Qg)
(Qc)
(Qd)
(Qe)
(Qi)
(Qf)
(Qj)
0.01
µF
922
20
8
24
23
5
6
4
10
19
2
3
1
28
26
27
7
25
11
12
13
14
15
16
17
18
21
82
RL/2
RL/2
82
130
649
0.01
µF
0.01
µF
0.01
µF
130
270
0.01
µF
0.01
µF
82
130
0.01
µF
270
270
130
1500
82
25
8
6
7
26
4
23
19
10
5
27
28
1
2
11
12
13
14
15
16
17
18
22
3
VCC
GND
RP
ENN
ENA
BISTEN
SVS
SC/D
OUTC–
OUTC+
OUTB–
OUTB+
OUTA–
OUTA+
MODE
FOTO
D7
D6
D5
D4
D3
D2
D1
D0
CKW
VCC
RX–
RX+
GND
VCC
TX–
TX+
GND
B
A
D
C
B
A
D
C
E
REFCLK
GND
RDY
BISTEN
SO
SC/D
RVS
RF
IB–
IB+
IA–
IA+
D7
D6
D5
D4
D3
D2
D1
D0
CKR
A/B
MODE
Unused Output Left
Open or Wired to VCC
270
270
to Minimize Power Dissipation


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