CY7C056V
CY7C057V
Document #: 38-06055 Rev. *B
Page 10 of 23
Switching Waveforms
Notes:
23. R/W is HIGH for read cycles.
24. Device is continuously selected. CE0 = VIL, CE1=VIH, and B0, B1, B2, B3, WA, BA are valid. This waveform cannot be used for semaphore reads.
25. OE = VIL.
26. Address valid prior to or coinciding with CE0 transition LOW and CE1 transition HIGH.
27. To access RAM, CE0 = VIL, CE1=VIH, B0, B1, B2, B3, WA, BA are valid, and SEM = VIH. To access semaphore, CE0 = VIH, CE1=VIL and SEM = VIL or CE0
and SEM=VIL, and CE1= B0 = B1 = B2 = B3, =VIH.
tRC
tAA
tOHA
DATA VALID
PREVIOUS DATA VALID
DATA OUT
ADDRESS
tOHA
Read Cycle No. 1 (Either Port Address Access)[23, 24, 25]
tACE
tLZOE
tDOE
tHZOE
tHZCE
DATA VALID
tLZCE
tPU
tPD
ISB
ICC
DATA OUT
B2, B3, WA, BA
CE0, CE1, B0,B1,
CURRENT
Read Cycle No. 2 (Either Port CE/OE Access)[23, 26, 27]
SELECT VALID
OE
DATA OUT
tRC
ADDRESS
tAA
tOHA
CE0, CE1
tLZCE
tABE
tHZCE
tHZCE
tACE
tLZCE
Read Cycle No. 3 (Either Port)[23, 25, 26, 27]
B0, B1, B2,
B3, WA, BA
BYTE SELECT VALID
CHIP SELECT VALID
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