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P-Channel Logic Level Enhancement
Mode Field Effect Transistor
PA502FMG
SOT-23
Lead-Free
NIKO-SEM
2
Nov-03-2004
Forward Transconductance
1
gfs
VDS = -5V, ID = -2A
16
S
DYNAMIC
Input Capacitance
Ciss
410
Output Capacitance
Coss
220
Reverse Transfer Capacitance
Crss
VGS = 0V, VDS = -6V, f = 1MHz
85
pF
Total Gate Charge
2
Qg
5.8
10
Gate-Source Charge
2
Qgs
0.85
Gate-Drain Charge
2
Qgd
VDS = 0.5V(BR)DSS, VGS = -4.5V,
ID = -2A
1.70
nC
Turn-On Delay Time
2
td(on)
13
Rise Time
2
tr
VDD = -10V
36
Turn-Off Delay Time
2
td(off)
ID
≅ -1A, V
GS = -4.5V, RG = 6Ω
42
Fall Time
2
tf
34
nS
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
IS
-1.6
Pulsed Current
3
ISM
-3
A
Forward Voltage
1
VSD
IF = -1A, VGS = 0V
-1.2
V
1Pulse test : Pulse Width
≤ 300 µsec, Duty Cycle ≤ 2%.
2Independent of operating temperature.
3Pulse width limited by maximum junction temperature.
REMARK: THE PRODUCT MARKED WITH “20YWW”, DATE CODE or LOT #
Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.