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LM2651MTC-ADJ Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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LM2651MTC-ADJ Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 11 page Design Procedure (Continued) INPUT CAPACITOR A low ESR aluminum, tantalum, or ceramic capacitor is needed betwen the input pin and power ground. This capaci- tor prevents large voltage transients from appearing at the input. The capacitor is selected based on the RMS current and voltage requirements. The RMS current is given by: The RMS current reaches its maximum (I OUT/2) when V IN equals 2VOUT. For an aluminum or ceramic capacitor, the voltage rating should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating required is about twice the maximum input voltage. The tantalum capacitor should be surge current tested by the manufacturer to prevent being shorted by the inrush current. It is also recommended to put a small ceramic capacitor (0.1 µF) between the input pin and ground pin to reduce high frequency spikes. INDUCTOR The most critical parameters for the inductor are the induc- tance, peak current and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages: A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, current stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage ripple require- ment. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the ripple current in- creases with the input voltage, the maximum input voltage is always used to determine the inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the inductor copper loss equal 2% of the output power. OUTPUT CAPACITOR The selection of C OUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant fre- quency, PWM mode is approximated by: The ESR term usually plays the dominant role in determining the voltage ripple. A low ESR aluminum electrolytic or tanta- lum capacitor (such as Nichicon PL series, Sanyo OS-CON, Sprague 593D, 594D, AVX TPS, and CDE polymer alumi- num) is recommended. An electrolytic capacitor is not rec- ommended for temperatures below −25˚C since its ESR rises dramatically at cold temperature. A tantalum capacitor has a much better ESR specification at cold temperature and is preferred for low temperature applications. The output voltage ripple in constant frequency mode has to be less than the sleep mode voltage hysteresis to avoid entering the sleep mode at full load: V RIPPLE < 20mV x VOUT /VFB BOOST CAPACITOR A 0.1 µF ceramic capacitor is recommended for the boost capacitor. The typical voltage across the boost capacitor is 6.7V. SOFT-START CAPACITOR A soft-start capacitor is used to provide the soft-start feature. When the input voltage is first applied, or when the SD(SS) pin is allowed to go high, the soft-start capacitor is charged by a current source (approximately 2 µA). When the SD(SS) pin voltage reaches 0.6V (shutdown threshold), the internal regulator circuitry starts to operate. The current charging the soft-start capacitor increases from 2 µA to approximately 10 µA. With the SD(SS) pin voltage between 0.6V and 1.3V, the level of the current limit is zero, which means the output voltage is still zero. When the SD(SS) pin voltage increases beyond 1.3V, the current limit starts to increase. The switch duty cycle, which is controlled by the level of the current limit, starts with narrow pulses and gradually gets wider. At the same time, the output voltage of the converter increases towards the nominal value, which brings down the output voltage of the error amplifier. When the output of the error amplifier is less than the current limit voltage, it takes over the control of the duty cycle. The converter enters the normal current-mode PWM operation. The SD(SS) pin voltage is eventually charged up to about 2V. The soft-start time can be estimated as: T SS =CSS x 0.6V/2 µA + CSS x (2V−0.6V)/10 µA R 1 AND R2 (Programming Output Voltage) Use the following formula to select the appropriate resistor values: V OUT =VREF(1+R1/R2) where V REF = 1.238V Select resistors between 10k Ω and 100kΩ. (1% or higher accuracy metal film resistors for R 1 and R2.) COMPENSATION COMPONENTS In the control to output transfer function, the first pole F p1 can be estimated as 1/(2 πR OUTCOUT); The ESR zero Fz1 of the output capacitor is 1/(2 πESRC OUT); Also, there is a high frequency pole F p2 in the range of 45kHz to 150kHz: F p2 =Fs/( πn(1−D)) whereD=V OUT/VIN, n = 1+0.348L/(VIN−VOUT)(L isinµHs and V IN and VOUT in volts). The total loop gain G is approximately 500/I OUT where IOUT is in amperes. A Gm amplifier is used inside the LM2651. The output resis- tor R o of the Gm amplifier is about 80k Ω.C c1 and RC together with R o give a lag compensation to roll off the gain: F pc1 = 1/(2 πC c1(Ro+Rc)), Fzc1 = 1/2 πC c1Rc. In some applications, the ESR zero F z1 can not be cancelled by F p2. Then, Cc2 is needed to introduce Fpc2 to cancel the ESR zero, F p2 = 1/(2 πC c2Ro\Rc). The rule of thumb is to have more than 45˚ phase margin at the crossover frequency (G=1). If C OUT is higher than 68µF, Cc1 = 2.2nF, and Rc = 15K Ω are good choices for most applications. If the ESR zero is too low to be cancelled by F p2, add Cc2. If the transient response to a step load is important, choose R C to be higher than 10k Ω. www.national.com 9 |
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