CY2CC810
Document #: 38-07056 Rev. *E
Page 3 of 9
Power Supply Characteristics (see Figure 5)
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
∆
ICC
Delta ICC Quiescent Power
Supply Current
(IDD @ VDD = Max. and VIN = VDD) – (IDD @ VDD = Max.
and VIN = VDD – 0.6V)
50
µA
ICCD
Dynamic Power Supply
Current
VDD = Max.
Input toggling 50% Duty Cycle, Outputs Open
0.63
mA/
MHz
IC
Total Power Supply Current VDD = Max.
Input toggling 50% Duty Cycle, Outputs Open
fL = 40 MHZ
25
mA
tPU
Power-up time for all VDDs
Power-up to reach minimum specified voltage
(power ramp must be monotonic)
0.05
500
ms
High-frequency Parametrics
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
DJ
Jitter, Deterministic
50% duty cycle tW(50–50)
The “point to point load circuit”
Output Jitter – Input Jitter
2.5V
23
35
ps
3.3V
19
30
ps
Fmax(3.3V)
Maximum frequency
VDD = 3.3V
50% duty cycle tW(50–50)
Standard Load Circuit.
See Figure 5
160
MHz
50% duty cycle tW(50–50)
The “point to point load circuit”
See Figure 7
650
Fmax(2.5V
Maximum frequency
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
See Figure 7
200
MHz
Fmax(20)
Maximum frequency
VDD = 3.3 V
20% duty cycle tW(20–80)
The “point to point load circuit”
VIN = 3.0V/0.0V VOUT = 2.3V/0.4V
See Figure 7
250
MHz
Maximum frequency
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
See Figure 3
200
MHz
tW
Minimum pulse
VDD = 3.3 V
The “point to point load circuit”
VIN = 3.0V/0.0V F = 100 MHz
VOUT = 2.0V/0.8V
See Figure 7
1ns
Minimum pulse
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V F = 100 MHz
VOUT = 1.7V/0.7V
See Figure 3
1
AC Switching Characteristics @ 3.3V, VDD = 3.3V ±5%, Temperature = –40°C to +85°C
Parameter
Description
Min.
Typ.
Max.
Unit
tPLH
Propagation Delay – Low to High
See Figure 4
1.5
2.7
3.5
ns
tPHL
Propagation Delay – High to Low
1.5
2.7
3.5
ns
tR
Output Rise Time
0.8
V/ns
tF
Output Fall Time
0.8
V/ns
tSK(0)
Output Skew: Skew between outputs of the same package (in phase) See Figure 10
0.25
0.38
ns
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output
(tPHL – tPLH).
See Figure 9
0.2
ns
tSK(t)
Package Skew: Skew between outputs of different packages at the
same power supply voltage, temperature and package type.
See Figure 11
0.42
ns
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