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X96011V14I Datasheet(PDF) 9 Page - Intersil Corporation |
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X96011V14I Datasheet(HTML) 9 Page - Intersil Corporation |
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9 / 18 page  9 FN8215.2 February 25, 2008 Control Register 1 This register is accessed by performing a Read or Write operation to address 81h of memory. This byte’s volatility is determined by bit NV13 in Control register 0. LDA5 - LDA0: LUT DIRECT ACCESS BITS When bit LDAS (bit 4 in Control register 5) is set to “1”, the LUT is addressed by these six bits, and it is not addressed by the output of the on-chip A/D converter. When bit LDAS is set to “0”, these six bits are ignored by the X96011. See Figure 7. A value between 00h (0010) and 3Fh (6310) may be written to these register bits, to select the corresponding row in the LUT. The written value is added to the base address of the LUT (90h). Control Register 3 This register is accessed by performing a Read or Write operation to address 83h of memory. This byte’s volatility is determined by bit NV13 in Control register 0. DDA7 - DDA0: D/A DIRECT ACCESS BITS When bit DDAS (bit 5 in Control register 5) is set to “1”, the input to the D/A converter is the content of bits DDA7-DDA0, and it is not a row of LUT. When bit DDAS is set to “0” (default) these eight bits are ignored by the X96011. See Figure 6. Control Register 5 This register is accessed by performing a Read or Write operation to address 85h of memory. IFSO1 - IFSO0: CURRENT GENERATOR FULL SCALE OUTPUT SET BITS (NON-VOLATILE) These two bits are used to set the full scale output current at the Current Generator pin, Iout, according to the following table. The direction of this current is set by bit IDS in Control register 0. See Figure 5. LDAS: LUT DIRECT ACCESS SELECT BIT (NON-VOLATILE) When bit LDAS is set to “0” (default), the LUT is addressed by the output of the on-chip A/D converter. When bit LDAS is set to “1”, LUT is addressed by bits LDA5 - LDA0. DDAS: D/A DIRECT ACCESS SELECT BIT (NON-VOLATILE) When bit DDAS is set to “0” (default), the input to the D/A converter is a row of the LUT. When bit DDAS is set to “1”, that input is the content of the Control register 3. Control Register 6 This register is accessed by performing a Read or Write operation to address 86h of memory. WEL: WRITE ENABLE LATCH (VOLATILE) The WEL bit controls the Write Enable status of the entire X96011 device. This bit must be set to “1” before any other Write operation (volatile or nonvolatile). Otherwise, any proceeding Write operation to memory is aborted and no ACK is issued after a Data Byte. • The WEL bit is a volatile latch that powers up in the “0” state (disabled). The WEL bit is enabled by writing 100000002 to Control register 6. Once enabled, the WEL bit remains set to “1” until the X96011 is powered down, and then up again, or until it is reset to “0” by writing 000000002 to Control register 6. A Write operation that modifies the value of the WEL bit will not cause a change in other bits of Control register 6. Status Register - ADC Output This register is accessed by performing a Read operation to address 87h of memory. AD7 - AD0: A/D CONVERTER OUTPUT BITS (READ ONLY) This byte is the binary output of the on-chip digital thermometer. The output is 000000002 for -40°C and 111111112 for +100°C. The six MSBs select a row of the LUT. Look-Up Table The X96011 memory array contains a 64-byte look-up table. The look-up table is associated to pin Iout’s output current generator through the D/A converter. The output of the look-up table is the byte contained in the selected row. By default this byte is the input to the D/A converter driving pin IOUT. The byte address of the selected row is obtained by adding the look-up table base address 90h, and the appropriate row selection bits. See Figure 6. By default the look-up table selection bits are the 6 MSBs of the digital thermometer output. Alternatively, the A/D converter can be bypassed and the six row selection bits are the six LSBs of Control Register 1 for the LUT. The selection between these options is illustrated in Figure 6. Current Generator Block The Current Generator pin Iout is the output of the current mode D/A converter. D/A Converter Operation The Block Diagram for the D/A converter is shown in Figure 5. The input byte of the D/A converter selects a voltage on the non-inverting input of an operational amplifier. The output of the amplifier drives the gate of a FET. This node is also fed back to the inverting input of the amplifier. The drain of the FET is connected to the output current pin (IOUT) via a “polarity select” circuit block. I1FSO1 I1FSO0 I1 Full Scale Output Current 0 0 Reserved (Don’t Use) 01 ±0.4mA 10 ±0.85 mA 11 ±1.3 mA (Default) X96011 |
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