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X25256BG Datasheet(PDF) 2 Page - IC MICROSYSTEMS |
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X25256BG Datasheet(HTML) 2 Page - IC MICROSYSTEMS |
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2 / 17 page  X25256 – Preliminary Information Characteristics subject to change without notice. 2 of 17 www.icmic.com The X25256 utilizes Xicor’s proprietary Direct Write ™ cell, providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years. PIN CONFIGURATION PIN NAMES PIN DESCRIPTIONS Serial Output (SO) SO is a push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial Input (SI) SI is the serial data input pin. All opcodes, byte addresses, and data to be written to the memory are input on this pin. Data is latched by the rising edge of the serial clock. Serial Clock (SCK) The Serial Clock controls the serial bus timing for data input and output. Opcodes, addresses, or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin change after the falling edge of the clock input. Chip Select (CS) When CS is HIGH, the X25256 is deselected and the SO output pin is at high impedance and unless an internal write operation is underway, the X25256 will be in the standby power mode. CS LOW enables the X25256, placing it in the active power mode. It should be noted that after power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Write Protect (WP) When WP is LOW and the nonvolatile bit WPEN is “1”, nonvolatile writes to the X25256 status register are dis- abled, but the part otherwise functions normally. When WP is held HIGH, all functions, including nonvolatile writes operate normally. WP going LOW while CS is still LOW will interrupt a write to the X25256 status reg- ister. If the internal write cycle has already been initi- ated, WP going LOW will have no affect on a write. The WP pin function is blocked when the WPEN bit in the status register is “0”. This allows the user to install the X25256 in a system with WP pin grounded and still be able to write to the status register. The WP pin func- tions will be enabled when the WPEN bit is set “1”. Symbol Description CS Chip Select Input SO Serial Output SI Serial Input SCK Serial Clock Input WP Write Protect Input VSS Ground VCC Supply Voltage HOLD Hold Input NC No Connect 20-Lead TSSOP NC 1 2 3 4 7 6 5 X25256 NC NC SO NC 14 15 16 17 18 20 19 NC CS NC NC V CC HOLD SCK WP 8 10 9 VSS NC NC 11 12 13 NC SI NC NC 8-Lead SOIC V CC HOLD SCK CS 1 2 3 4 6 7 8 X25256 V SS SI 5 SO WP S0 SI WP SCK VCC VSS CS HOLD 8 7 6 5 1 2 3 4 8-Lead XBGA |
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