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DS90C402 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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DS90C402 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 8 page Applications Information (Continued) 1. Open Input Pins. The DS90C402 is a dual receiver device, and if an application requires only one receiver, the unused channel(s) inputs should be left OPEN. Do not tie unused receiver inputs to ground or any other voltages. The input is biased by internal high value pull up and pull down resistors to set the output to a HIGH state. This internal circuitry will guarantee a HIGH, stable output state for open inputs. 2. Terminated Input. If the driver is disconnected (cable unplugged), or if the driver is in a power-off condition, the receiver output will again be in a HIGH state, even with the end of cable 100 Ω termination resistor across the input pins. The unplugged cable can become a floating antenna which can pick up noise. If the cable picks up more than 10mV of differential noise, the re- ceiver may see the noise as a valid signal and switch. To insure that any noise is seen as common-mode and not differential, a balanced interconnect should be used. Twisted pair cable will offer better balance than flat ribbon cable 3. Shorted Inputs. If a fault condition occurs that shorts the receiver inputs together, thus resulting in a 0V differ- ential input voltage, the receiver output will remain in a HIGH state. Shorted input fail-safe is not supported across the common-mode range of the device (GND to 2.4V). It is only supported with inputs shorted and no external common-mode voltage applied. Pin Descriptions Pin No. Name Description 2, 6 R OUT Receiver output pin 3, 7 R IN+ Positive receiver input pin 4, 8 R IN- Negative receiver input pin 5 GND Ground pin 1V CC Positive power supply pin, +5V ± 10% Ordering Information Operating Temperature Package Type/ Number Order Number −40˚C to +85˚C SOP/M08A DS90C402M RECEIVE MODE R IN+ −RIN− R OUT > +100 mV H < −100 mV L 100 mV > & > −100 mV X H = Logic High Level L = Logic Low level X = Indeterminant State Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise specified. Note 3: All typicals are given for: VCC = +5.0V, TA = +25˚C. Note 4: Generator waveform for all tests unless otherwise specified:f=1 MHz, ZO =50Ω,tr and tf (0%–100%) ≤ 1 ns for RIN. Note 5: Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same chip with an event on the inputs. Note 6: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays. Note 7: ESD Rating: HBM (1.5 k Ω, 100 pF) ≥ 3,500V EIAJ (0 Ω, 200 pF) ≥ 250V Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not exceed maximum junction temperature specification. Note 9: CL includes probe and jig capacitance. www.national.com 4 |
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