5

Test Circuits and Waveforms

Logic input waveform is inverted for switches that have the opposite

logic sense.

FIGURE 1A. MEASUREMENT POINTS

capacitance.

FIGURE 1B. TEST CIRCUIT

FIGURE 1. SWITCHING TIMES

FIGURE 2A. MEASUREMENT POINTS

FIGURE 2B. TEST CIRCUIT

FIGURE 2. CHARGE INJECTION

FIGURE 3A. MEASUREMENT POINTS (ISL8325 ONLY)

FIGURE 3B. TEST CIRCUIT (ISL8325 ONLY)

FIGURE 3. BREAK-BEFORE-MAKE TIME

50%

90%

3V

0V

0V

LOGIC

INPUT

SWITCH

INPUT

SWITCH

OUTPUT

90%

V

OUT

V

(NO or NC)

R

L

R

L

R

ON

()

+

------------------------------

=

SWITCH

INPUT

LOGIC

INPUT

COM

NO or NC

IN

1k

Ω

35pF

GND

V+

C

∆V

OUT

ON

OFF

ON

Q =

∆V

SWITCH

OUTPUT

LOGIC

INPUT

V+

0V

GND

COM

NO or NC

V+

C

LOGIC

INPUT

IN

90%

3V

0V

0V

LOGIC

INPUT

SWITCH

OUTPUT

SWITCH

OUTPUT

90%

0V

LOGIC

INPUT

300

Ω

35pF

300

Ω

35pF

NO1

NC2

GND

V+

C

ISL8323, ISL8324, ISL8325