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CY28341ZC-2T Datasheet(PDF) 8 Page - SpectraLinear Inc

Part # CY28341ZC-2T
Description  Universal Clock Chip for VIA?줡4M/KT/KM400 DDR Systems
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Manufacturer  SPECTRALINEAR [SpectraLinear Inc]
Direct Link  http://www.spectralinear.com
Logo SPECTRALINEAR - SpectraLinear Inc

CY28341ZC-2T Datasheet(HTML) 8 Page - SpectraLinear Inc

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CY28341-2
Rev 1.0, November 21, 2006
Page 8 of 18
Dial-a-Frequency Feature
SMBus Dial-a-Frequency feature is available in this device via
Byte7 and Byte9.
P is a PLL constant that depends on the frequency selection
prior to accessing the Dial-a-Frequency feature.
7
0
Reserved
Reserved for device function test.
6
0
N6, MSB
These bits are for programming the PLL’s internal N register. This access
allows the user to modify the CPU frequency at very high resolution
(accuracy). All other synchronous clocks (clocks that are generated from
the same PLL, such as PCI) remain at their existing ratios relative to the
CPU clock.
50
N5
40
N4
30
N3
20
N2
10
N3
00
N0, LSB
Byte 7: Dial-a-Frequency Control Register N
Byte 8: Silicon Signature Register (all bits are read-only)
Bit
@Pup
Pin#
Name
Description
7
0
Revision_ID3
Revision ID bit [3]
6
0
Revision_ID2
Revision ID bit [2]
5
0
Revision_ID1
Revision ID bit [1]
4
1
Revision_ID0
Revision ID bit [0]
3
1
Vendor_ID3
Cypress's Vendor ID bit [3].
2
0
Vendor_ID2
Cypress's Vendor ID bit [2].
1
0
Vendor_ID1
Cypress's Vendor ID bit [1].
0
0
Vendor_ID0
Cypress's Vendor ID bit [0].
Byte9: Dial-A-Frequency Control Register R
Bit
@Pup
Pin#
Name
Description
70
Reserved
6
0
R5, MSB
These bits are for programming the PLL’s internal R register. This access
allows the user to modify the CPU frequency at very high resolution
(accuracy). All other synchronous clocks (clocks that are generated from
the same PLL, such as PCI) remain at their existing ratios relative to the
CPU clock.
50
R4
40
R3
30
R2
20
R1
10
R0
00
DAF_ENB
R and N register mux selection. 0 = R and N values come from the ROM.
1 = data is load from DAF (SMBus) registers.
Table 8.
FS(4:0)
P
XXXXX
96016000


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