CY28341-3 datasheet(9/19 Pages) SPECTRALINEAR

Part #	CY28341-3

Description	Universal Clock Chip for VIA?줡4M/KT/KM400A DDR Systems

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Manufacturer	SPECTRALINEAR [SpectraLinear Inc]

Direct Link	http://www.spectralinear.com

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9 / 19 page

CY28341-3

Rev 1.0, November 21, 2006

Page 9 of 19

Watchdog Self-Recovery Sequence

This feature is designed to allow the system designer to

change frequency while the system is running and reboot the

operation of the system in case of a hang-up due to the

frequency change.

When the system sends an SMBus command requesting a

frequency change through the Dial-a-Frequency Control

Registers, it must have previously sent a command to the

Watchdog timer to select which time-out stamp the Watchdog

must perform, otherwise the System Self-Recovery feature will

not be applicable. Consequently, this device will change

frequency and then the Watchdog timer starts timing.

Meanwhile, the system BIOS is running its operation with the

new frequency. If this device receives a new SMBus command

to clear the bits originally programmed in the Watchdog timer

bits (reprogram to 0000) before the Watchdog times out, then

this device will keep operating in its normal condition with the

new selected frequency.

The Watchdog timer will also be triggered if you program the

software frequency select bits (FSEL) to a new frequency

selection. If the Watchdog times out before the new SMBus

reprograms the Watchdog timer bits to (0000), then this device

send a low system reset pulse, on SRESET# and changes

Watchdog time-out bit to “1”.

Swing Select Functions Through Hardware

MULTSEL

Board Target

Trace/Term Z

Reference R,

IREF = VDD/(3*Rr)

Output Current

VOH@Z

1

50 Ohm

Rr = 475 1%,

IREF = 2.32mA

IOH = 6* Iref

0.7V@50

R E SET W AT CHD O G TIM E R

Set W D T i mer Bi ts = 0

C l ear W D A l ar m bi t = 0

IN IT IAL IZ E W AT CHDO G TIM E R

S et F r eq uenc y R ever t B i t

Set W D T i mer Bi ts

CHANG E F R E Q BY

S E T S O FTW AR E F SEL

S et S W F r eq _S el bi ts

S et F S over r i de bi t

CH AN G E F R E Q B Y

SET DIAL - A- R AT IO

S el ec t a di ffer ent di vi der r ati o

CHANG E F R E Q BY S E T D IAL - A-

FR E Q U E N C Y

Load M and N R eg i s ter s

Set Pr o_F r eq _EN = 1

W AT CHDO G TIM E R

PR O G R AM M IN G

CL E AR W D TIM E R

Set W D Al ar m = 1

CO UNT DO W N W D TIM E R

S end 3m s R es et P ul s e

NO

WD T im er = 0

Frequency R ev ert B it = 0

S et F r eq uenc y to

F S _H W _Latc hed

Freq uency R ev ert B it = 1

S et F r eq uenc y to

F S _S W S etti ng

S R E S E T # = 0 f o r 3 m sec

Reset & Revert

Frequency back

Figure 1. Watchdog Self Recovery Sequence Flowchart

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