L5951

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FUNCTIONAL DESCRIPTION

1.1 General Features

The L5951 is an integrated circuit which provides a J1850 physical layer as well three voltage regulators. The

L5951 was developed to provide the power and Class 2/IDR interface for a microcontroller.

1.2 REG1 Output Voltage

The REG1 regulator output is equal to 3.3V. The 3.3V regulator is non low drop out and can handle currents up

to 100mA with short citcuit limit of 280mA.

1.3 REG2 Output Voltage

The REG2 regulator output is equal to 5V and can handle currents up to 100mA with short citcuit limit of 280mA.

The output stage of the 5V regulator is low dropout.

1.4 REG3 Output Voltage

The REG3 regulator output is equal to 7.8V and can handle currents up to 100mA with short citcuit limit of

280mA. The output stage of the 7.8V regulator is low dropout. REG3 regulator is controlled by the EN (enable)

pin of the IC. REG3 can be turned on and off by toggling the EN pin. A logic "1" on the EN pin enables REG3,

while a logic "0" on the EN pin disables REG3. The maximum voltage when REG3 is off must be less than 0.2V.

Sleep* Input - The Class 2 transmitter can be turned on and turned off by the Sleep* pin. Once the voltage level

is above 2VDC, the transmitter is enabled. If the Sleep* pin drops below 0.8VDC, and EN is "0" the transceiver

goes into a low power mode. In low power mode, REG3 and the transceiver are disabled. The L5951 will still

receive messages and send them to the microcontroller out of the RX pin.

* denotes active low

LVS input - Reg1 and Reg2 are supplied by Vbat pin. The device could then dissipate a lot of power, causing

thermal shutdown at high voltage. For this reason a secondary low voltage supply (LVS) can be used to reduce

power dissipation.

Reset* Output - The L5951 has low voltage or no voltage circuitry that is a warning to the microcontroller. If

REG2 drops 0.3VDC below its normal operating voltage, the Reset* pin will go to a logic "0". Between the volt-

age levels of 4.65VDC (min) and 5.10VDC (max) on REG2, a reset will occur. There is a hysterisis of 50mV on

the Reset* pin.

* denotes active low

Low Input Voltage Operation - If battery voltage level drops below 7.0V, the outputs are to remain alive and

ready for the return of normal voltage battery levels. The L5951 will be able to retrieve data off the BUS and

send it to the micrprocessor when the supply voltage is as low as 4.9V. The regulators should stay the same

not guaranteed over all conditions below VBAT = 9.0V.

Waveshaping - Messages sent by the microcontroller to the transceiver are routed to a waveshaping circuit.

The digital signal is rounded at the switching points in order to reduce EMI emissions. A second order function,

I = C*dV/dt, is used to control the rise and fall times of the transmission. The rise and fall times are controlled

by an external resistor Rext . The waveshaping circuit can be enabled and disabled by the 4X pin. A logic "1"

will disable the waveshape circuit and a logic "0" will enable the waveshape circuit. In 4X mode, the speed of

the BUS is increased by a factor of four. Any signal coming from the microcontroller and going to the BUS must

be waveshaped. If loopback(LOOP) is enabled, the signal coming from the micro through the TX pin is routed

to the RX pin back to the micro with or without it being waveshaped. A logic "1" enables loopback and a logic"0"

disables loopback.

Nodes - The transmitter provides a wave-shaped 0 to 7.7 VDC waveform on the BUS output. It also receives

waveforms and transmits a digital level signal back to a logic IC. The transmitter can drive up to 32 remote trans-

ceivers. These remote nodes may be at ground potentials that are ±2 VDC, with respect to the assembly. Under

this condition, waveshaping will only be maintained during 3 of the 4 corners. The L5951 is a remote node on

the Class 2/IDR Bus. Each remote transceiver has a 470 + 10% pF capacitor on its output for EMI suppression,