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SL23EP04SI-2T Datasheet(PDF) 1 Page - SpectraLinear Inc |
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SL23EP04SI-2T Datasheet(HTML) 1 Page - SpectraLinear Inc |
1 / 14 page Rev 1.1, May 25, 2007 Page 1 of 14 2200 Laurelwood Road, Santa Clara, CA 95054 Tel: (408) 855-0555 Fax: (408) 855-0550 www.SpectraLinear.com SL23EP04 Key Features 10 to 220 MHz operating frequency range Low output clock skew: 60ps-typ Low output clock Jitter: - 35 ps-typ at 166MHz, CL=15pF and VDD=3.3V - 45 ps-typ at 166MHz, CL=15pF and VDD=2.5V Low part-to-part output skew: 150 ps-typ 3.3V to 2.5V power supply range Low power dissipation: - 12 mA-typ at 66MHz and VDD=3.3V - 10 mA-typ at 66MHz and VDD=2.5V One input drives 4 outputs Multiple configurations and drive options SpreadThru™ PLL that allows use of SSCG Available in 8-pin SOIC package Available in Commercial and Industrial grades Applications Printers, MFPs and Digital Copiers PCs and Work Stations Routers, Switchers and Servers Datacom and Telecom High-Speed Digital Embeded Systems Description The SL23EP04 is a low skew, low jitter and low power Zero Delay Buffer (ZDB) designed to produce up to four (4) clock outputs from one (1) reference input clock, for high speed clock distribution applications. The product has an on-chip PLL and a feedback pin (FBK) which can be used to obtain feedback from any one of the 4 output clocks. The SL23EP04 offers X/2,1X and 2X frequency options at the output with respect to input reference clock. Refer to the “Product Configuration Table” for the details of these options. The SL23EP04-1H and -2H High Drive version operates up to 220 MHz and 200MHz at 3.3 and 2.5V power supplies respectively. The standard versions -1 and -2 operate up to 167MHz and 135MHz at 3.3V and 2.5V power supplies respectively with CL=15pF output load. The SL23EP04 enter into Power Down (PD) mode if the input at CLKIN is DC (GND to VDD). In this state all 4 output clocks are tri-stated and the PLL is turned off, leading to 8 A-typ power supply current draw. Benefits Up to four (4) distribution of input clock Standard and High-Drive levels to control impedance level, frequency range and EMI Low skew, jitter and power dissipation Block Diagram Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB) P Prreelliim miin na arry y |
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