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RF2196 Datasheet(PDF) 4 Page - RF Micro Devices

Part # RF2196
Description  3V PCS LINEAR POWER AMPLIFIER
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Manufacturer  RFMD [RF Micro Devices]
Direct Link  http://www.rfmd.com
Logo RFMD - RF Micro Devices

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RF2196
Rev A3 DS070730
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Pin
Function
Description
Interface Schematic
1GND
This pin is internally grounded to the die flag.
2VREG1
Power Down control for first stage. Regulated voltage supply for amplifier
bias. In Power Down mode, both VREG and VMODE need to be LOW (<0.5V).
3MODE
For nominal operation (High Gain Mode), VMODE is set LOW. When set
HIGH, the driver and final are dynamically scaled to reduce the device size
and as a result to reduce idle current.
4VREG2
Power Down control for the second stage. Regulated voltage supply for
amplifier bias. In Power Down mode, both VREG and VMODE need to be LOW
(<0.5V).
5GND
Connect to ground plane via 15nH inductor. DC return for the second stage
bias circuit.
6NC
This pin has no internal bonding; therefore, this pin can be connected to
output pin 7, connected to the ground plane, or not connected. Slight tun-
ing of the output match may be required due to stray capacitance of the
pin.
7RF OUT
RF output and power supply for final stage. This is the unmatched collector
output of the second stage. A DC block is required following the matching
components. The biasing may be provided via a parallel L-C set for reso-
nance at the operating frequency of 1710MHz to 1910MHz. It is important
to select an inductor with very low DC resistance with a 1A current rating.
Alternatively, shunt microstrip techniques are also applicable and provide
very low DC resistance. Low frequency bypassing is required for stability.
8RF OUT
Same as pin 7.
See pin 7.
9GND
This pin is internally grounded to the die flag.
10
VCC
Supply for bias reference and control circuits. High frequency bypassing
may be necessary.
11
VCC1
Power supply for first stage and interstage match. Pins 11 and 12 should
be connected by a common trace where the pins contact the printed circuit
board.
12
VCC1
Same as pin 11.
13
NC
It is recommended that these pins be connected to the ground plane for
improved isolation between RF IN (pin 16) and the VCC1 pins (pins 11 and
12).
14
NC
It is recommended that these pins be connected to the ground plane for
improved isolation between RF IN (pin 16) and the VCC1 pins (pins 11 and
12).
15
NC
It is recommended that these pins be connected to the ground plane for
improved isolation between RF IN (pin 16) and the VCC1 pins (pins 11 and
12).
16
RF IN
RF input. An external 15pF series capacitor is required as a DC block. In
addition, the matching circuit shown is required to improve input VSWR.
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to a
top side ground pad which is connected to the ground plane with multiple
vias. The pad should have a short thermal path to the ground plane.
RF OUT
From Bias
Network
VCC1
15 pF
RF IN
From
Bias
Stages
GND1
3.6 pF
TL


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