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TH3122KDF Datasheet(PDF) 3 Page - Melexis Microelectronic Systems |
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TH3122KDF Datasheet(HTML) 3 Page - Melexis Microelectronic Systems |
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3 / 14 page  TH3122 K-Bus Transceiver with integrated Voltage Regulator Dec/04 Page 3 3901003122 Rev 004 Functional Description Figure 3 - Transmit Mode Pulse Diagram Figure 4 - Receive Mode Pulse Diagram BUS RxD t debH t debL < t debH < t debL The TH3122 consists of a voltage regulator 5V/100mA and a K-Bus transceiver, which is a bi-directional bus interface device for data transfer between K-Bus and the K-Bus protocol controller. Also integrated into the transceiver are a voltage and time controlled reset management, power down, wake up function and a universal comparator for extended applications. K-BUS Interface The BUS Interface builds the connection between the serial 5V bus line of the protocol controller and the 12V K-Bus line. The transceiver consists of a pnp-driver with slew rate control and fold-back characteristic and contains also in the receiver a high voltage comparator followed by a debouncing unit. Transmit Mode During the transmission the data at the pin TxD will be transferred to the pin BUS. To minimize the electromagnetic emission of the bus line, the TH3122 has an integrated slew rate control. Receive Mode The data at the pin BUS will be transferred to the pin RxD. Short spikes on the bus signal are suppressed by the implemented debouncing circuit. Figure 2 - Block Diagram K-Bus Transceiver POR VBAT POR VCC Control- logic Bit-Compare Constant-Low VCC ESD ESD VCC OSC Vref Biasing t debBUS pnp- Control - slew rate - I B - foldback V thH V thL RxD TxD SENSE BUS t debWake to W ake-up Logic SEN/STA TxD BUS |
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Similar Description - TH3122KDF |
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