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EVB71101 Datasheet(PDF) 4 Page - Melexis Microelectronic Systems |
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EVB71101 Datasheet(HTML) 4 Page - Melexis Microelectronic Systems |
4 / 14 page EVB71101 315/433MHz Receiver Evaluation Board Description 39012 71101 01 Page 4 of 14 EVB Description Rev. 011 June/07 1.3 Block Diagram Fig. 1: TH71101 block diagram 1.4 Mode Configurations ENRX Mode Description 0 RX standby RX disabled 1 RX active RX enable Note: ENRX are pulled down internally 1.5 LNA GAIN Control VGAIN_LNA Mode Description < 0.8 V HIGH GAIN LNA set to high gain > 1.4 V LOW GAIN LNA set to low gain Note: hysteresis between gain modes to ensure stability 1.6 Frequency Planning Frequency planning is straightforward for single-conversion applications because there is only one IF that can be chosen, and then the only possible choice is low-side or high-side injection of the LO signal (which is now the one and only LO signal in the receiver). The receiver’s single-conversion architecture requires careful frequency planning. Besides the desired RF input signal, there are a number of spurious signals that may cause an undesired response at the output. Among them is the image of the RF signal that must be suppressed by the RF front-end filter. MIX1 12 IN_LNA 4 31 8 5 67 11 IF 13 17 27 28 26 IF 10 9 LO 25 BIAS 30 VCO1 PFD RO 22 RO LF 29 CP 32 18 19 OAP OAN OUT_OA OA 20 LNA 3 2 1 MIX2 14 15 16 23 24 OUTP OUTN MIX3 IFA 21 DIV_16 |
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Similar Description - EVB71101 |
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