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US1881KSE Datasheet(PDF) 8 Page - Melexis Microelectronic Systems

Part # US1881KSE
Description  Hall Latch - High Sensitivity
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Manufacturer  MELEXIS [Melexis Microelectronic Systems]
Direct Link  http://www.melexis.com
Logo MELEXIS - Melexis Microelectronic Systems

US1881KSE Datasheet(HTML) 8 Page - Melexis Microelectronic Systems

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US1881
Hall Latch – High Sensitivity
3901001881
Page 8 of 12
Data Sheet
Rev 015
Jan/06
13 Application Information
14 Application Comments
For proper operation, a 100nF bypass capacitor should be placed as close as possible to the device between
the VDD and ground pin.
For reverse voltage protection, it is recommended to connect a resistor or a diode in series with the VDD pin.
When using a resistor, three points are important:
- the resistor has to limit the reverse current to 50mA maximum (VCC / R1 ≤ 50mA)
- the resulting device supply voltage VDD has to be higher than VDD min (VDD = VCC – R1.IDD)
- the resistor has to withstand the power dissipated in reverse voltage condition (PD = VCC
2 / R1)
When using a diode, a reverse current cannot flow and the voltage drop is almost constant (≈0.7V).
Therefore, a 100Ω/0.25W resistor for 5V application and a diode for higher supply voltage are recommended.
Both solutions provide the required reverse voltage protection.
When a weak power supply is used or when the device is intended to be used in noisy environment, it is
recommended that figure 13.3 from the Application Information section is used.
The low-pass filter formed by R1 and C1 and the zener diode Z1 bypass the disturbances or voltage spikes
occurring on the device supply voltage VDD. The diode D1 provides additional reverse voltage protection.
13.1 Typical Three-Wire Application Circuit
13.3 Automotive and Harsh, Noisy Environments
Three-Wire Circuit
13.2 Two-Wire Circuit
Note:
With this circuit, precise ON and OFF
currents can be detected using only two
connecting wires.
The resistors RL and Rb can be used to
bias the input current. Refer to the part
specifications for limiting values.
BRP :
IOFF = IR + IDD = VDD/Rb + IDD
BOP :
ION = IOFF + IOUT = IOFF + VDD/RL


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